1 /**
2 * \file
3 *
4 * \brief SAM OSCCTRL
5 *
6 * Copyright (C) 2016 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 */
42
43 #ifdef _SAML21_OSCCTRL_COMPONENT_
44 #ifndef _HRI_OSCCTRL_L21_H_INCLUDED_
45 #define _HRI_OSCCTRL_L21_H_INCLUDED_
46
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50
51 #include <stdbool.h>
52 #include <hal_atomic.h>
53
54 #if defined(ENABLE_OSCCTRL_CRITICAL_SECTIONS)
55 #define OSCCTRL_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER()
56 #define OSCCTRL_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE()
57 #else
58 #define OSCCTRL_CRITICAL_SECTION_ENTER()
59 #define OSCCTRL_CRITICAL_SECTION_LEAVE()
60 #endif
61
62 typedef uint16_t hri_oscctrl_dfllctrl_reg_t;
63 typedef uint16_t hri_oscctrl_xoscctrl_reg_t;
64 typedef uint32_t hri_oscctrl_dfllmul_reg_t;
65 typedef uint32_t hri_oscctrl_dfllval_reg_t;
66 typedef uint32_t hri_oscctrl_dpllctrlb_reg_t;
67 typedef uint32_t hri_oscctrl_dpllratio_reg_t;
68 typedef uint32_t hri_oscctrl_intenset_reg_t;
69 typedef uint32_t hri_oscctrl_intflag_reg_t;
70 typedef uint32_t hri_oscctrl_status_reg_t;
71 typedef uint8_t hri_oscctrl_dfllsync_reg_t;
72 typedef uint8_t hri_oscctrl_dpllctrla_reg_t;
73 typedef uint8_t hri_oscctrl_dpllpresc_reg_t;
74 typedef uint8_t hri_oscctrl_dpllstatus_reg_t;
75 typedef uint8_t hri_oscctrl_dpllsyncbusy_reg_t;
76 typedef uint8_t hri_oscctrl_osc16mctrl_reg_t;
77
hri_oscctrl_set_INTEN_XOSCRDY_bit(const void * const hw)78 static inline void hri_oscctrl_set_INTEN_XOSCRDY_bit(const void *const hw)
79 {
80 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_XOSCRDY;
81 }
82
hri_oscctrl_get_INTEN_XOSCRDY_bit(const void * const hw)83 static inline bool hri_oscctrl_get_INTEN_XOSCRDY_bit(const void *const hw)
84 {
85 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_XOSCRDY) >> OSCCTRL_INTENSET_XOSCRDY_Pos;
86 }
87
hri_oscctrl_write_INTEN_XOSCRDY_bit(const void * const hw,bool value)88 static inline void hri_oscctrl_write_INTEN_XOSCRDY_bit(const void *const hw, bool value)
89 {
90 if (value == 0x0) {
91 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_XOSCRDY;
92 } else {
93 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_XOSCRDY;
94 }
95 }
96
hri_oscctrl_clear_INTEN_XOSCRDY_bit(const void * const hw)97 static inline void hri_oscctrl_clear_INTEN_XOSCRDY_bit(const void *const hw)
98 {
99 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_XOSCRDY;
100 }
101
hri_oscctrl_set_INTEN_OSC16MRDY_bit(const void * const hw)102 static inline void hri_oscctrl_set_INTEN_OSC16MRDY_bit(const void *const hw)
103 {
104 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_OSC16MRDY;
105 }
106
hri_oscctrl_get_INTEN_OSC16MRDY_bit(const void * const hw)107 static inline bool hri_oscctrl_get_INTEN_OSC16MRDY_bit(const void *const hw)
108 {
109 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_OSC16MRDY) >> OSCCTRL_INTENSET_OSC16MRDY_Pos;
110 }
111
hri_oscctrl_write_INTEN_OSC16MRDY_bit(const void * const hw,bool value)112 static inline void hri_oscctrl_write_INTEN_OSC16MRDY_bit(const void *const hw, bool value)
113 {
114 if (value == 0x0) {
115 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_OSC16MRDY;
116 } else {
117 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_OSC16MRDY;
118 }
119 }
120
hri_oscctrl_clear_INTEN_OSC16MRDY_bit(const void * const hw)121 static inline void hri_oscctrl_clear_INTEN_OSC16MRDY_bit(const void *const hw)
122 {
123 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_OSC16MRDY;
124 }
125
hri_oscctrl_set_INTEN_DFLLRDY_bit(const void * const hw)126 static inline void hri_oscctrl_set_INTEN_DFLLRDY_bit(const void *const hw)
127 {
128 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLRDY;
129 }
130
hri_oscctrl_get_INTEN_DFLLRDY_bit(const void * const hw)131 static inline bool hri_oscctrl_get_INTEN_DFLLRDY_bit(const void *const hw)
132 {
133 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DFLLRDY) >> OSCCTRL_INTENSET_DFLLRDY_Pos;
134 }
135
hri_oscctrl_write_INTEN_DFLLRDY_bit(const void * const hw,bool value)136 static inline void hri_oscctrl_write_INTEN_DFLLRDY_bit(const void *const hw, bool value)
137 {
138 if (value == 0x0) {
139 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLRDY;
140 } else {
141 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLRDY;
142 }
143 }
144
hri_oscctrl_clear_INTEN_DFLLRDY_bit(const void * const hw)145 static inline void hri_oscctrl_clear_INTEN_DFLLRDY_bit(const void *const hw)
146 {
147 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLRDY;
148 }
149
hri_oscctrl_set_INTEN_DFLLOOB_bit(const void * const hw)150 static inline void hri_oscctrl_set_INTEN_DFLLOOB_bit(const void *const hw)
151 {
152 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLOOB;
153 }
154
hri_oscctrl_get_INTEN_DFLLOOB_bit(const void * const hw)155 static inline bool hri_oscctrl_get_INTEN_DFLLOOB_bit(const void *const hw)
156 {
157 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DFLLOOB) >> OSCCTRL_INTENSET_DFLLOOB_Pos;
158 }
159
hri_oscctrl_write_INTEN_DFLLOOB_bit(const void * const hw,bool value)160 static inline void hri_oscctrl_write_INTEN_DFLLOOB_bit(const void *const hw, bool value)
161 {
162 if (value == 0x0) {
163 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLOOB;
164 } else {
165 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLOOB;
166 }
167 }
168
hri_oscctrl_clear_INTEN_DFLLOOB_bit(const void * const hw)169 static inline void hri_oscctrl_clear_INTEN_DFLLOOB_bit(const void *const hw)
170 {
171 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLOOB;
172 }
173
hri_oscctrl_set_INTEN_DFLLLCKF_bit(const void * const hw)174 static inline void hri_oscctrl_set_INTEN_DFLLLCKF_bit(const void *const hw)
175 {
176 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLLCKF;
177 }
178
hri_oscctrl_get_INTEN_DFLLLCKF_bit(const void * const hw)179 static inline bool hri_oscctrl_get_INTEN_DFLLLCKF_bit(const void *const hw)
180 {
181 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DFLLLCKF) >> OSCCTRL_INTENSET_DFLLLCKF_Pos;
182 }
183
hri_oscctrl_write_INTEN_DFLLLCKF_bit(const void * const hw,bool value)184 static inline void hri_oscctrl_write_INTEN_DFLLLCKF_bit(const void *const hw, bool value)
185 {
186 if (value == 0x0) {
187 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLLCKF;
188 } else {
189 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLLCKF;
190 }
191 }
192
hri_oscctrl_clear_INTEN_DFLLLCKF_bit(const void * const hw)193 static inline void hri_oscctrl_clear_INTEN_DFLLLCKF_bit(const void *const hw)
194 {
195 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLLCKF;
196 }
197
hri_oscctrl_set_INTEN_DFLLLCKC_bit(const void * const hw)198 static inline void hri_oscctrl_set_INTEN_DFLLLCKC_bit(const void *const hw)
199 {
200 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLLCKC;
201 }
202
hri_oscctrl_get_INTEN_DFLLLCKC_bit(const void * const hw)203 static inline bool hri_oscctrl_get_INTEN_DFLLLCKC_bit(const void *const hw)
204 {
205 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DFLLLCKC) >> OSCCTRL_INTENSET_DFLLLCKC_Pos;
206 }
207
hri_oscctrl_write_INTEN_DFLLLCKC_bit(const void * const hw,bool value)208 static inline void hri_oscctrl_write_INTEN_DFLLLCKC_bit(const void *const hw, bool value)
209 {
210 if (value == 0x0) {
211 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLLCKC;
212 } else {
213 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLLCKC;
214 }
215 }
216
hri_oscctrl_clear_INTEN_DFLLLCKC_bit(const void * const hw)217 static inline void hri_oscctrl_clear_INTEN_DFLLLCKC_bit(const void *const hw)
218 {
219 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLLCKC;
220 }
221
hri_oscctrl_set_INTEN_DFLLRCS_bit(const void * const hw)222 static inline void hri_oscctrl_set_INTEN_DFLLRCS_bit(const void *const hw)
223 {
224 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLRCS;
225 }
226
hri_oscctrl_get_INTEN_DFLLRCS_bit(const void * const hw)227 static inline bool hri_oscctrl_get_INTEN_DFLLRCS_bit(const void *const hw)
228 {
229 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DFLLRCS) >> OSCCTRL_INTENSET_DFLLRCS_Pos;
230 }
231
hri_oscctrl_write_INTEN_DFLLRCS_bit(const void * const hw,bool value)232 static inline void hri_oscctrl_write_INTEN_DFLLRCS_bit(const void *const hw, bool value)
233 {
234 if (value == 0x0) {
235 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLRCS;
236 } else {
237 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DFLLRCS;
238 }
239 }
240
hri_oscctrl_clear_INTEN_DFLLRCS_bit(const void * const hw)241 static inline void hri_oscctrl_clear_INTEN_DFLLRCS_bit(const void *const hw)
242 {
243 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DFLLRCS;
244 }
245
hri_oscctrl_set_INTEN_DPLLLCKR_bit(const void * const hw)246 static inline void hri_oscctrl_set_INTEN_DPLLLCKR_bit(const void *const hw)
247 {
248 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLCKR;
249 }
250
hri_oscctrl_get_INTEN_DPLLLCKR_bit(const void * const hw)251 static inline bool hri_oscctrl_get_INTEN_DPLLLCKR_bit(const void *const hw)
252 {
253 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DPLLLCKR) >> OSCCTRL_INTENSET_DPLLLCKR_Pos;
254 }
255
hri_oscctrl_write_INTEN_DPLLLCKR_bit(const void * const hw,bool value)256 static inline void hri_oscctrl_write_INTEN_DPLLLCKR_bit(const void *const hw, bool value)
257 {
258 if (value == 0x0) {
259 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLCKR;
260 } else {
261 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLCKR;
262 }
263 }
264
hri_oscctrl_clear_INTEN_DPLLLCKR_bit(const void * const hw)265 static inline void hri_oscctrl_clear_INTEN_DPLLLCKR_bit(const void *const hw)
266 {
267 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLCKR;
268 }
269
hri_oscctrl_set_INTEN_DPLLLCKF_bit(const void * const hw)270 static inline void hri_oscctrl_set_INTEN_DPLLLCKF_bit(const void *const hw)
271 {
272 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLCKF;
273 }
274
hri_oscctrl_get_INTEN_DPLLLCKF_bit(const void * const hw)275 static inline bool hri_oscctrl_get_INTEN_DPLLLCKF_bit(const void *const hw)
276 {
277 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DPLLLCKF) >> OSCCTRL_INTENSET_DPLLLCKF_Pos;
278 }
279
hri_oscctrl_write_INTEN_DPLLLCKF_bit(const void * const hw,bool value)280 static inline void hri_oscctrl_write_INTEN_DPLLLCKF_bit(const void *const hw, bool value)
281 {
282 if (value == 0x0) {
283 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLCKF;
284 } else {
285 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLCKF;
286 }
287 }
288
hri_oscctrl_clear_INTEN_DPLLLCKF_bit(const void * const hw)289 static inline void hri_oscctrl_clear_INTEN_DPLLLCKF_bit(const void *const hw)
290 {
291 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLCKF;
292 }
293
hri_oscctrl_set_INTEN_DPLLLTO_bit(const void * const hw)294 static inline void hri_oscctrl_set_INTEN_DPLLLTO_bit(const void *const hw)
295 {
296 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLTO;
297 }
298
hri_oscctrl_get_INTEN_DPLLLTO_bit(const void * const hw)299 static inline bool hri_oscctrl_get_INTEN_DPLLLTO_bit(const void *const hw)
300 {
301 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DPLLLTO) >> OSCCTRL_INTENSET_DPLLLTO_Pos;
302 }
303
hri_oscctrl_write_INTEN_DPLLLTO_bit(const void * const hw,bool value)304 static inline void hri_oscctrl_write_INTEN_DPLLLTO_bit(const void *const hw, bool value)
305 {
306 if (value == 0x0) {
307 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLTO;
308 } else {
309 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLTO;
310 }
311 }
312
hri_oscctrl_clear_INTEN_DPLLLTO_bit(const void * const hw)313 static inline void hri_oscctrl_clear_INTEN_DPLLLTO_bit(const void *const hw)
314 {
315 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLTO;
316 }
317
hri_oscctrl_set_INTEN_DPLLLDRTO_bit(const void * const hw)318 static inline void hri_oscctrl_set_INTEN_DPLLLDRTO_bit(const void *const hw)
319 {
320 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLDRTO;
321 }
322
hri_oscctrl_get_INTEN_DPLLLDRTO_bit(const void * const hw)323 static inline bool hri_oscctrl_get_INTEN_DPLLLDRTO_bit(const void *const hw)
324 {
325 return (((Oscctrl *)hw)->INTENSET.reg & OSCCTRL_INTENSET_DPLLLDRTO) >> OSCCTRL_INTENSET_DPLLLDRTO_Pos;
326 }
327
hri_oscctrl_write_INTEN_DPLLLDRTO_bit(const void * const hw,bool value)328 static inline void hri_oscctrl_write_INTEN_DPLLLDRTO_bit(const void *const hw, bool value)
329 {
330 if (value == 0x0) {
331 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLDRTO;
332 } else {
333 ((Oscctrl *)hw)->INTENSET.reg = OSCCTRL_INTENSET_DPLLLDRTO;
334 }
335 }
336
hri_oscctrl_clear_INTEN_DPLLLDRTO_bit(const void * const hw)337 static inline void hri_oscctrl_clear_INTEN_DPLLLDRTO_bit(const void *const hw)
338 {
339 ((Oscctrl *)hw)->INTENCLR.reg = OSCCTRL_INTENSET_DPLLLDRTO;
340 }
341
hri_oscctrl_set_INTEN_reg(const void * const hw,hri_oscctrl_intenset_reg_t mask)342 static inline void hri_oscctrl_set_INTEN_reg(const void *const hw, hri_oscctrl_intenset_reg_t mask)
343 {
344 ((Oscctrl *)hw)->INTENSET.reg = mask;
345 }
346
hri_oscctrl_get_INTEN_reg(const void * const hw,hri_oscctrl_intenset_reg_t mask)347 static inline hri_oscctrl_intenset_reg_t hri_oscctrl_get_INTEN_reg(const void *const hw,
348 hri_oscctrl_intenset_reg_t mask)
349 {
350 uint32_t tmp;
351 tmp = ((Oscctrl *)hw)->INTENSET.reg;
352 tmp &= mask;
353 return tmp;
354 }
355
hri_oscctrl_read_INTEN_reg(const void * const hw)356 static inline hri_oscctrl_intenset_reg_t hri_oscctrl_read_INTEN_reg(const void *const hw)
357 {
358 return ((Oscctrl *)hw)->INTENSET.reg;
359 }
360
hri_oscctrl_write_INTEN_reg(const void * const hw,hri_oscctrl_intenset_reg_t data)361 static inline void hri_oscctrl_write_INTEN_reg(const void *const hw, hri_oscctrl_intenset_reg_t data)
362 {
363 ((Oscctrl *)hw)->INTENSET.reg = data;
364 ((Oscctrl *)hw)->INTENCLR.reg = ~data;
365 }
366
hri_oscctrl_clear_INTEN_reg(const void * const hw,hri_oscctrl_intenset_reg_t mask)367 static inline void hri_oscctrl_clear_INTEN_reg(const void *const hw, hri_oscctrl_intenset_reg_t mask)
368 {
369 ((Oscctrl *)hw)->INTENCLR.reg = mask;
370 }
371
hri_oscctrl_get_INTFLAG_XOSCRDY_bit(const void * const hw)372 static inline bool hri_oscctrl_get_INTFLAG_XOSCRDY_bit(const void *const hw)
373 {
374 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_XOSCRDY) >> OSCCTRL_INTFLAG_XOSCRDY_Pos;
375 }
376
hri_oscctrl_clear_INTFLAG_XOSCRDY_bit(const void * const hw)377 static inline void hri_oscctrl_clear_INTFLAG_XOSCRDY_bit(const void *const hw)
378 {
379 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_XOSCRDY;
380 }
381
hri_oscctrl_get_INTFLAG_OSC16MRDY_bit(const void * const hw)382 static inline bool hri_oscctrl_get_INTFLAG_OSC16MRDY_bit(const void *const hw)
383 {
384 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_OSC16MRDY) >> OSCCTRL_INTFLAG_OSC16MRDY_Pos;
385 }
386
hri_oscctrl_clear_INTFLAG_OSC16MRDY_bit(const void * const hw)387 static inline void hri_oscctrl_clear_INTFLAG_OSC16MRDY_bit(const void *const hw)
388 {
389 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_OSC16MRDY;
390 }
391
hri_oscctrl_get_INTFLAG_DFLLRDY_bit(const void * const hw)392 static inline bool hri_oscctrl_get_INTFLAG_DFLLRDY_bit(const void *const hw)
393 {
394 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLRDY) >> OSCCTRL_INTFLAG_DFLLRDY_Pos;
395 }
396
hri_oscctrl_clear_INTFLAG_DFLLRDY_bit(const void * const hw)397 static inline void hri_oscctrl_clear_INTFLAG_DFLLRDY_bit(const void *const hw)
398 {
399 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLRDY;
400 }
401
hri_oscctrl_get_INTFLAG_DFLLOOB_bit(const void * const hw)402 static inline bool hri_oscctrl_get_INTFLAG_DFLLOOB_bit(const void *const hw)
403 {
404 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLOOB) >> OSCCTRL_INTFLAG_DFLLOOB_Pos;
405 }
406
hri_oscctrl_clear_INTFLAG_DFLLOOB_bit(const void * const hw)407 static inline void hri_oscctrl_clear_INTFLAG_DFLLOOB_bit(const void *const hw)
408 {
409 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLOOB;
410 }
411
hri_oscctrl_get_INTFLAG_DFLLLCKF_bit(const void * const hw)412 static inline bool hri_oscctrl_get_INTFLAG_DFLLLCKF_bit(const void *const hw)
413 {
414 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLLCKF) >> OSCCTRL_INTFLAG_DFLLLCKF_Pos;
415 }
416
hri_oscctrl_clear_INTFLAG_DFLLLCKF_bit(const void * const hw)417 static inline void hri_oscctrl_clear_INTFLAG_DFLLLCKF_bit(const void *const hw)
418 {
419 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLLCKF;
420 }
421
hri_oscctrl_get_INTFLAG_DFLLLCKC_bit(const void * const hw)422 static inline bool hri_oscctrl_get_INTFLAG_DFLLLCKC_bit(const void *const hw)
423 {
424 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLLCKC) >> OSCCTRL_INTFLAG_DFLLLCKC_Pos;
425 }
426
hri_oscctrl_clear_INTFLAG_DFLLLCKC_bit(const void * const hw)427 static inline void hri_oscctrl_clear_INTFLAG_DFLLLCKC_bit(const void *const hw)
428 {
429 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLLCKC;
430 }
431
hri_oscctrl_get_INTFLAG_DFLLRCS_bit(const void * const hw)432 static inline bool hri_oscctrl_get_INTFLAG_DFLLRCS_bit(const void *const hw)
433 {
434 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLRCS) >> OSCCTRL_INTFLAG_DFLLRCS_Pos;
435 }
436
hri_oscctrl_clear_INTFLAG_DFLLRCS_bit(const void * const hw)437 static inline void hri_oscctrl_clear_INTFLAG_DFLLRCS_bit(const void *const hw)
438 {
439 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLRCS;
440 }
441
hri_oscctrl_get_INTFLAG_DPLLLCKR_bit(const void * const hw)442 static inline bool hri_oscctrl_get_INTFLAG_DPLLLCKR_bit(const void *const hw)
443 {
444 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLCKR) >> OSCCTRL_INTFLAG_DPLLLCKR_Pos;
445 }
446
hri_oscctrl_clear_INTFLAG_DPLLLCKR_bit(const void * const hw)447 static inline void hri_oscctrl_clear_INTFLAG_DPLLLCKR_bit(const void *const hw)
448 {
449 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLCKR;
450 }
451
hri_oscctrl_get_INTFLAG_DPLLLCKF_bit(const void * const hw)452 static inline bool hri_oscctrl_get_INTFLAG_DPLLLCKF_bit(const void *const hw)
453 {
454 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLCKF) >> OSCCTRL_INTFLAG_DPLLLCKF_Pos;
455 }
456
hri_oscctrl_clear_INTFLAG_DPLLLCKF_bit(const void * const hw)457 static inline void hri_oscctrl_clear_INTFLAG_DPLLLCKF_bit(const void *const hw)
458 {
459 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLCKF;
460 }
461
hri_oscctrl_get_INTFLAG_DPLLLTO_bit(const void * const hw)462 static inline bool hri_oscctrl_get_INTFLAG_DPLLLTO_bit(const void *const hw)
463 {
464 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLTO) >> OSCCTRL_INTFLAG_DPLLLTO_Pos;
465 }
466
hri_oscctrl_clear_INTFLAG_DPLLLTO_bit(const void * const hw)467 static inline void hri_oscctrl_clear_INTFLAG_DPLLLTO_bit(const void *const hw)
468 {
469 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLTO;
470 }
471
hri_oscctrl_get_INTFLAG_DPLLLDRTO_bit(const void * const hw)472 static inline bool hri_oscctrl_get_INTFLAG_DPLLLDRTO_bit(const void *const hw)
473 {
474 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLDRTO) >> OSCCTRL_INTFLAG_DPLLLDRTO_Pos;
475 }
476
hri_oscctrl_clear_INTFLAG_DPLLLDRTO_bit(const void * const hw)477 static inline void hri_oscctrl_clear_INTFLAG_DPLLLDRTO_bit(const void *const hw)
478 {
479 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLDRTO;
480 }
481
hri_oscctrl_get_interrupt_XOSCRDY_bit(const void * const hw)482 static inline bool hri_oscctrl_get_interrupt_XOSCRDY_bit(const void *const hw)
483 {
484 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_XOSCRDY) >> OSCCTRL_INTFLAG_XOSCRDY_Pos;
485 }
486
hri_oscctrl_clear_interrupt_XOSCRDY_bit(const void * const hw)487 static inline void hri_oscctrl_clear_interrupt_XOSCRDY_bit(const void *const hw)
488 {
489 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_XOSCRDY;
490 }
491
hri_oscctrl_get_interrupt_OSC16MRDY_bit(const void * const hw)492 static inline bool hri_oscctrl_get_interrupt_OSC16MRDY_bit(const void *const hw)
493 {
494 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_OSC16MRDY) >> OSCCTRL_INTFLAG_OSC16MRDY_Pos;
495 }
496
hri_oscctrl_clear_interrupt_OSC16MRDY_bit(const void * const hw)497 static inline void hri_oscctrl_clear_interrupt_OSC16MRDY_bit(const void *const hw)
498 {
499 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_OSC16MRDY;
500 }
501
hri_oscctrl_get_interrupt_DFLLRDY_bit(const void * const hw)502 static inline bool hri_oscctrl_get_interrupt_DFLLRDY_bit(const void *const hw)
503 {
504 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLRDY) >> OSCCTRL_INTFLAG_DFLLRDY_Pos;
505 }
506
hri_oscctrl_clear_interrupt_DFLLRDY_bit(const void * const hw)507 static inline void hri_oscctrl_clear_interrupt_DFLLRDY_bit(const void *const hw)
508 {
509 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLRDY;
510 }
511
hri_oscctrl_get_interrupt_DFLLOOB_bit(const void * const hw)512 static inline bool hri_oscctrl_get_interrupt_DFLLOOB_bit(const void *const hw)
513 {
514 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLOOB) >> OSCCTRL_INTFLAG_DFLLOOB_Pos;
515 }
516
hri_oscctrl_clear_interrupt_DFLLOOB_bit(const void * const hw)517 static inline void hri_oscctrl_clear_interrupt_DFLLOOB_bit(const void *const hw)
518 {
519 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLOOB;
520 }
521
hri_oscctrl_get_interrupt_DFLLLCKF_bit(const void * const hw)522 static inline bool hri_oscctrl_get_interrupt_DFLLLCKF_bit(const void *const hw)
523 {
524 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLLCKF) >> OSCCTRL_INTFLAG_DFLLLCKF_Pos;
525 }
526
hri_oscctrl_clear_interrupt_DFLLLCKF_bit(const void * const hw)527 static inline void hri_oscctrl_clear_interrupt_DFLLLCKF_bit(const void *const hw)
528 {
529 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLLCKF;
530 }
531
hri_oscctrl_get_interrupt_DFLLLCKC_bit(const void * const hw)532 static inline bool hri_oscctrl_get_interrupt_DFLLLCKC_bit(const void *const hw)
533 {
534 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLLCKC) >> OSCCTRL_INTFLAG_DFLLLCKC_Pos;
535 }
536
hri_oscctrl_clear_interrupt_DFLLLCKC_bit(const void * const hw)537 static inline void hri_oscctrl_clear_interrupt_DFLLLCKC_bit(const void *const hw)
538 {
539 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLLCKC;
540 }
541
hri_oscctrl_get_interrupt_DFLLRCS_bit(const void * const hw)542 static inline bool hri_oscctrl_get_interrupt_DFLLRCS_bit(const void *const hw)
543 {
544 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DFLLRCS) >> OSCCTRL_INTFLAG_DFLLRCS_Pos;
545 }
546
hri_oscctrl_clear_interrupt_DFLLRCS_bit(const void * const hw)547 static inline void hri_oscctrl_clear_interrupt_DFLLRCS_bit(const void *const hw)
548 {
549 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DFLLRCS;
550 }
551
hri_oscctrl_get_interrupt_DPLLLCKR_bit(const void * const hw)552 static inline bool hri_oscctrl_get_interrupt_DPLLLCKR_bit(const void *const hw)
553 {
554 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLCKR) >> OSCCTRL_INTFLAG_DPLLLCKR_Pos;
555 }
556
hri_oscctrl_clear_interrupt_DPLLLCKR_bit(const void * const hw)557 static inline void hri_oscctrl_clear_interrupt_DPLLLCKR_bit(const void *const hw)
558 {
559 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLCKR;
560 }
561
hri_oscctrl_get_interrupt_DPLLLCKF_bit(const void * const hw)562 static inline bool hri_oscctrl_get_interrupt_DPLLLCKF_bit(const void *const hw)
563 {
564 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLCKF) >> OSCCTRL_INTFLAG_DPLLLCKF_Pos;
565 }
566
hri_oscctrl_clear_interrupt_DPLLLCKF_bit(const void * const hw)567 static inline void hri_oscctrl_clear_interrupt_DPLLLCKF_bit(const void *const hw)
568 {
569 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLCKF;
570 }
571
hri_oscctrl_get_interrupt_DPLLLTO_bit(const void * const hw)572 static inline bool hri_oscctrl_get_interrupt_DPLLLTO_bit(const void *const hw)
573 {
574 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLTO) >> OSCCTRL_INTFLAG_DPLLLTO_Pos;
575 }
576
hri_oscctrl_clear_interrupt_DPLLLTO_bit(const void * const hw)577 static inline void hri_oscctrl_clear_interrupt_DPLLLTO_bit(const void *const hw)
578 {
579 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLTO;
580 }
581
hri_oscctrl_get_interrupt_DPLLLDRTO_bit(const void * const hw)582 static inline bool hri_oscctrl_get_interrupt_DPLLLDRTO_bit(const void *const hw)
583 {
584 return (((Oscctrl *)hw)->INTFLAG.reg & OSCCTRL_INTFLAG_DPLLLDRTO) >> OSCCTRL_INTFLAG_DPLLLDRTO_Pos;
585 }
586
hri_oscctrl_clear_interrupt_DPLLLDRTO_bit(const void * const hw)587 static inline void hri_oscctrl_clear_interrupt_DPLLLDRTO_bit(const void *const hw)
588 {
589 ((Oscctrl *)hw)->INTFLAG.reg = OSCCTRL_INTFLAG_DPLLLDRTO;
590 }
591
hri_oscctrl_get_INTFLAG_reg(const void * const hw,hri_oscctrl_intflag_reg_t mask)592 static inline hri_oscctrl_intflag_reg_t hri_oscctrl_get_INTFLAG_reg(const void *const hw,
593 hri_oscctrl_intflag_reg_t mask)
594 {
595 uint32_t tmp;
596 tmp = ((Oscctrl *)hw)->INTFLAG.reg;
597 tmp &= mask;
598 return tmp;
599 }
600
hri_oscctrl_read_INTFLAG_reg(const void * const hw)601 static inline hri_oscctrl_intflag_reg_t hri_oscctrl_read_INTFLAG_reg(const void *const hw)
602 {
603 return ((Oscctrl *)hw)->INTFLAG.reg;
604 }
605
hri_oscctrl_clear_INTFLAG_reg(const void * const hw,hri_oscctrl_intflag_reg_t mask)606 static inline void hri_oscctrl_clear_INTFLAG_reg(const void *const hw, hri_oscctrl_intflag_reg_t mask)
607 {
608 ((Oscctrl *)hw)->INTFLAG.reg = mask;
609 }
610
hri_oscctrl_set_XOSCCTRL_ENABLE_bit(const void * const hw)611 static inline void hri_oscctrl_set_XOSCCTRL_ENABLE_bit(const void *const hw)
612 {
613 OSCCTRL_CRITICAL_SECTION_ENTER();
614 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_ENABLE;
615 OSCCTRL_CRITICAL_SECTION_LEAVE();
616 }
617
hri_oscctrl_get_XOSCCTRL_ENABLE_bit(const void * const hw)618 static inline bool hri_oscctrl_get_XOSCCTRL_ENABLE_bit(const void *const hw)
619 {
620 uint16_t tmp;
621 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
622 tmp = (tmp & OSCCTRL_XOSCCTRL_ENABLE) >> OSCCTRL_XOSCCTRL_ENABLE_Pos;
623 return (bool)tmp;
624 }
625
hri_oscctrl_write_XOSCCTRL_ENABLE_bit(const void * const hw,bool value)626 static inline void hri_oscctrl_write_XOSCCTRL_ENABLE_bit(const void *const hw, bool value)
627 {
628 uint16_t tmp;
629 OSCCTRL_CRITICAL_SECTION_ENTER();
630 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
631 tmp &= ~OSCCTRL_XOSCCTRL_ENABLE;
632 tmp |= value << OSCCTRL_XOSCCTRL_ENABLE_Pos;
633 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
634 OSCCTRL_CRITICAL_SECTION_LEAVE();
635 }
636
hri_oscctrl_clear_XOSCCTRL_ENABLE_bit(const void * const hw)637 static inline void hri_oscctrl_clear_XOSCCTRL_ENABLE_bit(const void *const hw)
638 {
639 OSCCTRL_CRITICAL_SECTION_ENTER();
640 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_ENABLE;
641 OSCCTRL_CRITICAL_SECTION_LEAVE();
642 }
643
hri_oscctrl_toggle_XOSCCTRL_ENABLE_bit(const void * const hw)644 static inline void hri_oscctrl_toggle_XOSCCTRL_ENABLE_bit(const void *const hw)
645 {
646 OSCCTRL_CRITICAL_SECTION_ENTER();
647 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_ENABLE;
648 OSCCTRL_CRITICAL_SECTION_LEAVE();
649 }
650
hri_oscctrl_set_XOSCCTRL_XTALEN_bit(const void * const hw)651 static inline void hri_oscctrl_set_XOSCCTRL_XTALEN_bit(const void *const hw)
652 {
653 OSCCTRL_CRITICAL_SECTION_ENTER();
654 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_XTALEN;
655 OSCCTRL_CRITICAL_SECTION_LEAVE();
656 }
657
hri_oscctrl_get_XOSCCTRL_XTALEN_bit(const void * const hw)658 static inline bool hri_oscctrl_get_XOSCCTRL_XTALEN_bit(const void *const hw)
659 {
660 uint16_t tmp;
661 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
662 tmp = (tmp & OSCCTRL_XOSCCTRL_XTALEN) >> OSCCTRL_XOSCCTRL_XTALEN_Pos;
663 return (bool)tmp;
664 }
665
hri_oscctrl_write_XOSCCTRL_XTALEN_bit(const void * const hw,bool value)666 static inline void hri_oscctrl_write_XOSCCTRL_XTALEN_bit(const void *const hw, bool value)
667 {
668 uint16_t tmp;
669 OSCCTRL_CRITICAL_SECTION_ENTER();
670 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
671 tmp &= ~OSCCTRL_XOSCCTRL_XTALEN;
672 tmp |= value << OSCCTRL_XOSCCTRL_XTALEN_Pos;
673 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
674 OSCCTRL_CRITICAL_SECTION_LEAVE();
675 }
676
hri_oscctrl_clear_XOSCCTRL_XTALEN_bit(const void * const hw)677 static inline void hri_oscctrl_clear_XOSCCTRL_XTALEN_bit(const void *const hw)
678 {
679 OSCCTRL_CRITICAL_SECTION_ENTER();
680 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_XTALEN;
681 OSCCTRL_CRITICAL_SECTION_LEAVE();
682 }
683
hri_oscctrl_toggle_XOSCCTRL_XTALEN_bit(const void * const hw)684 static inline void hri_oscctrl_toggle_XOSCCTRL_XTALEN_bit(const void *const hw)
685 {
686 OSCCTRL_CRITICAL_SECTION_ENTER();
687 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_XTALEN;
688 OSCCTRL_CRITICAL_SECTION_LEAVE();
689 }
690
hri_oscctrl_set_XOSCCTRL_RUNSTDBY_bit(const void * const hw)691 static inline void hri_oscctrl_set_XOSCCTRL_RUNSTDBY_bit(const void *const hw)
692 {
693 OSCCTRL_CRITICAL_SECTION_ENTER();
694 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_RUNSTDBY;
695 OSCCTRL_CRITICAL_SECTION_LEAVE();
696 }
697
hri_oscctrl_get_XOSCCTRL_RUNSTDBY_bit(const void * const hw)698 static inline bool hri_oscctrl_get_XOSCCTRL_RUNSTDBY_bit(const void *const hw)
699 {
700 uint16_t tmp;
701 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
702 tmp = (tmp & OSCCTRL_XOSCCTRL_RUNSTDBY) >> OSCCTRL_XOSCCTRL_RUNSTDBY_Pos;
703 return (bool)tmp;
704 }
705
hri_oscctrl_write_XOSCCTRL_RUNSTDBY_bit(const void * const hw,bool value)706 static inline void hri_oscctrl_write_XOSCCTRL_RUNSTDBY_bit(const void *const hw, bool value)
707 {
708 uint16_t tmp;
709 OSCCTRL_CRITICAL_SECTION_ENTER();
710 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
711 tmp &= ~OSCCTRL_XOSCCTRL_RUNSTDBY;
712 tmp |= value << OSCCTRL_XOSCCTRL_RUNSTDBY_Pos;
713 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
714 OSCCTRL_CRITICAL_SECTION_LEAVE();
715 }
716
hri_oscctrl_clear_XOSCCTRL_RUNSTDBY_bit(const void * const hw)717 static inline void hri_oscctrl_clear_XOSCCTRL_RUNSTDBY_bit(const void *const hw)
718 {
719 OSCCTRL_CRITICAL_SECTION_ENTER();
720 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_RUNSTDBY;
721 OSCCTRL_CRITICAL_SECTION_LEAVE();
722 }
723
hri_oscctrl_toggle_XOSCCTRL_RUNSTDBY_bit(const void * const hw)724 static inline void hri_oscctrl_toggle_XOSCCTRL_RUNSTDBY_bit(const void *const hw)
725 {
726 OSCCTRL_CRITICAL_SECTION_ENTER();
727 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_RUNSTDBY;
728 OSCCTRL_CRITICAL_SECTION_LEAVE();
729 }
730
hri_oscctrl_set_XOSCCTRL_ONDEMAND_bit(const void * const hw)731 static inline void hri_oscctrl_set_XOSCCTRL_ONDEMAND_bit(const void *const hw)
732 {
733 OSCCTRL_CRITICAL_SECTION_ENTER();
734 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_ONDEMAND;
735 OSCCTRL_CRITICAL_SECTION_LEAVE();
736 }
737
hri_oscctrl_get_XOSCCTRL_ONDEMAND_bit(const void * const hw)738 static inline bool hri_oscctrl_get_XOSCCTRL_ONDEMAND_bit(const void *const hw)
739 {
740 uint16_t tmp;
741 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
742 tmp = (tmp & OSCCTRL_XOSCCTRL_ONDEMAND) >> OSCCTRL_XOSCCTRL_ONDEMAND_Pos;
743 return (bool)tmp;
744 }
745
hri_oscctrl_write_XOSCCTRL_ONDEMAND_bit(const void * const hw,bool value)746 static inline void hri_oscctrl_write_XOSCCTRL_ONDEMAND_bit(const void *const hw, bool value)
747 {
748 uint16_t tmp;
749 OSCCTRL_CRITICAL_SECTION_ENTER();
750 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
751 tmp &= ~OSCCTRL_XOSCCTRL_ONDEMAND;
752 tmp |= value << OSCCTRL_XOSCCTRL_ONDEMAND_Pos;
753 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
754 OSCCTRL_CRITICAL_SECTION_LEAVE();
755 }
756
hri_oscctrl_clear_XOSCCTRL_ONDEMAND_bit(const void * const hw)757 static inline void hri_oscctrl_clear_XOSCCTRL_ONDEMAND_bit(const void *const hw)
758 {
759 OSCCTRL_CRITICAL_SECTION_ENTER();
760 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_ONDEMAND;
761 OSCCTRL_CRITICAL_SECTION_LEAVE();
762 }
763
hri_oscctrl_toggle_XOSCCTRL_ONDEMAND_bit(const void * const hw)764 static inline void hri_oscctrl_toggle_XOSCCTRL_ONDEMAND_bit(const void *const hw)
765 {
766 OSCCTRL_CRITICAL_SECTION_ENTER();
767 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_ONDEMAND;
768 OSCCTRL_CRITICAL_SECTION_LEAVE();
769 }
770
hri_oscctrl_set_XOSCCTRL_AMPGC_bit(const void * const hw)771 static inline void hri_oscctrl_set_XOSCCTRL_AMPGC_bit(const void *const hw)
772 {
773 OSCCTRL_CRITICAL_SECTION_ENTER();
774 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_AMPGC;
775 OSCCTRL_CRITICAL_SECTION_LEAVE();
776 }
777
hri_oscctrl_get_XOSCCTRL_AMPGC_bit(const void * const hw)778 static inline bool hri_oscctrl_get_XOSCCTRL_AMPGC_bit(const void *const hw)
779 {
780 uint16_t tmp;
781 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
782 tmp = (tmp & OSCCTRL_XOSCCTRL_AMPGC) >> OSCCTRL_XOSCCTRL_AMPGC_Pos;
783 return (bool)tmp;
784 }
785
hri_oscctrl_write_XOSCCTRL_AMPGC_bit(const void * const hw,bool value)786 static inline void hri_oscctrl_write_XOSCCTRL_AMPGC_bit(const void *const hw, bool value)
787 {
788 uint16_t tmp;
789 OSCCTRL_CRITICAL_SECTION_ENTER();
790 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
791 tmp &= ~OSCCTRL_XOSCCTRL_AMPGC;
792 tmp |= value << OSCCTRL_XOSCCTRL_AMPGC_Pos;
793 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
794 OSCCTRL_CRITICAL_SECTION_LEAVE();
795 }
796
hri_oscctrl_clear_XOSCCTRL_AMPGC_bit(const void * const hw)797 static inline void hri_oscctrl_clear_XOSCCTRL_AMPGC_bit(const void *const hw)
798 {
799 OSCCTRL_CRITICAL_SECTION_ENTER();
800 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_AMPGC;
801 OSCCTRL_CRITICAL_SECTION_LEAVE();
802 }
803
hri_oscctrl_toggle_XOSCCTRL_AMPGC_bit(const void * const hw)804 static inline void hri_oscctrl_toggle_XOSCCTRL_AMPGC_bit(const void *const hw)
805 {
806 OSCCTRL_CRITICAL_SECTION_ENTER();
807 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_AMPGC;
808 OSCCTRL_CRITICAL_SECTION_LEAVE();
809 }
810
hri_oscctrl_set_XOSCCTRL_GAIN_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)811 static inline void hri_oscctrl_set_XOSCCTRL_GAIN_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
812 {
813 OSCCTRL_CRITICAL_SECTION_ENTER();
814 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_GAIN(mask);
815 OSCCTRL_CRITICAL_SECTION_LEAVE();
816 }
817
hri_oscctrl_get_XOSCCTRL_GAIN_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)818 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_get_XOSCCTRL_GAIN_bf(const void *const hw,
819 hri_oscctrl_xoscctrl_reg_t mask)
820 {
821 uint16_t tmp;
822 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
823 tmp = (tmp & OSCCTRL_XOSCCTRL_GAIN(mask)) >> OSCCTRL_XOSCCTRL_GAIN_Pos;
824 return tmp;
825 }
826
hri_oscctrl_write_XOSCCTRL_GAIN_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t data)827 static inline void hri_oscctrl_write_XOSCCTRL_GAIN_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t data)
828 {
829 uint16_t tmp;
830 OSCCTRL_CRITICAL_SECTION_ENTER();
831 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
832 tmp &= ~OSCCTRL_XOSCCTRL_GAIN_Msk;
833 tmp |= OSCCTRL_XOSCCTRL_GAIN(data);
834 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
835 OSCCTRL_CRITICAL_SECTION_LEAVE();
836 }
837
hri_oscctrl_clear_XOSCCTRL_GAIN_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)838 static inline void hri_oscctrl_clear_XOSCCTRL_GAIN_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
839 {
840 OSCCTRL_CRITICAL_SECTION_ENTER();
841 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_GAIN(mask);
842 OSCCTRL_CRITICAL_SECTION_LEAVE();
843 }
844
hri_oscctrl_toggle_XOSCCTRL_GAIN_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)845 static inline void hri_oscctrl_toggle_XOSCCTRL_GAIN_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
846 {
847 OSCCTRL_CRITICAL_SECTION_ENTER();
848 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_GAIN(mask);
849 OSCCTRL_CRITICAL_SECTION_LEAVE();
850 }
851
hri_oscctrl_read_XOSCCTRL_GAIN_bf(const void * const hw)852 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_read_XOSCCTRL_GAIN_bf(const void *const hw)
853 {
854 uint16_t tmp;
855 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
856 tmp = (tmp & OSCCTRL_XOSCCTRL_GAIN_Msk) >> OSCCTRL_XOSCCTRL_GAIN_Pos;
857 return tmp;
858 }
859
hri_oscctrl_set_XOSCCTRL_STARTUP_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)860 static inline void hri_oscctrl_set_XOSCCTRL_STARTUP_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
861 {
862 OSCCTRL_CRITICAL_SECTION_ENTER();
863 ((Oscctrl *)hw)->XOSCCTRL.reg |= OSCCTRL_XOSCCTRL_STARTUP(mask);
864 OSCCTRL_CRITICAL_SECTION_LEAVE();
865 }
866
hri_oscctrl_get_XOSCCTRL_STARTUP_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)867 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_get_XOSCCTRL_STARTUP_bf(const void *const hw,
868 hri_oscctrl_xoscctrl_reg_t mask)
869 {
870 uint16_t tmp;
871 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
872 tmp = (tmp & OSCCTRL_XOSCCTRL_STARTUP(mask)) >> OSCCTRL_XOSCCTRL_STARTUP_Pos;
873 return tmp;
874 }
875
hri_oscctrl_write_XOSCCTRL_STARTUP_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t data)876 static inline void hri_oscctrl_write_XOSCCTRL_STARTUP_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t data)
877 {
878 uint16_t tmp;
879 OSCCTRL_CRITICAL_SECTION_ENTER();
880 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
881 tmp &= ~OSCCTRL_XOSCCTRL_STARTUP_Msk;
882 tmp |= OSCCTRL_XOSCCTRL_STARTUP(data);
883 ((Oscctrl *)hw)->XOSCCTRL.reg = tmp;
884 OSCCTRL_CRITICAL_SECTION_LEAVE();
885 }
886
hri_oscctrl_clear_XOSCCTRL_STARTUP_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)887 static inline void hri_oscctrl_clear_XOSCCTRL_STARTUP_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
888 {
889 OSCCTRL_CRITICAL_SECTION_ENTER();
890 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~OSCCTRL_XOSCCTRL_STARTUP(mask);
891 OSCCTRL_CRITICAL_SECTION_LEAVE();
892 }
893
hri_oscctrl_toggle_XOSCCTRL_STARTUP_bf(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)894 static inline void hri_oscctrl_toggle_XOSCCTRL_STARTUP_bf(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
895 {
896 OSCCTRL_CRITICAL_SECTION_ENTER();
897 ((Oscctrl *)hw)->XOSCCTRL.reg ^= OSCCTRL_XOSCCTRL_STARTUP(mask);
898 OSCCTRL_CRITICAL_SECTION_LEAVE();
899 }
900
hri_oscctrl_read_XOSCCTRL_STARTUP_bf(const void * const hw)901 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_read_XOSCCTRL_STARTUP_bf(const void *const hw)
902 {
903 uint16_t tmp;
904 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
905 tmp = (tmp & OSCCTRL_XOSCCTRL_STARTUP_Msk) >> OSCCTRL_XOSCCTRL_STARTUP_Pos;
906 return tmp;
907 }
908
hri_oscctrl_set_XOSCCTRL_reg(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)909 static inline void hri_oscctrl_set_XOSCCTRL_reg(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
910 {
911 OSCCTRL_CRITICAL_SECTION_ENTER();
912 ((Oscctrl *)hw)->XOSCCTRL.reg |= mask;
913 OSCCTRL_CRITICAL_SECTION_LEAVE();
914 }
915
hri_oscctrl_get_XOSCCTRL_reg(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)916 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_get_XOSCCTRL_reg(const void *const hw,
917 hri_oscctrl_xoscctrl_reg_t mask)
918 {
919 uint16_t tmp;
920 tmp = ((Oscctrl *)hw)->XOSCCTRL.reg;
921 tmp &= mask;
922 return tmp;
923 }
924
hri_oscctrl_write_XOSCCTRL_reg(const void * const hw,hri_oscctrl_xoscctrl_reg_t data)925 static inline void hri_oscctrl_write_XOSCCTRL_reg(const void *const hw, hri_oscctrl_xoscctrl_reg_t data)
926 {
927 OSCCTRL_CRITICAL_SECTION_ENTER();
928 ((Oscctrl *)hw)->XOSCCTRL.reg = data;
929 OSCCTRL_CRITICAL_SECTION_LEAVE();
930 }
931
hri_oscctrl_clear_XOSCCTRL_reg(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)932 static inline void hri_oscctrl_clear_XOSCCTRL_reg(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
933 {
934 OSCCTRL_CRITICAL_SECTION_ENTER();
935 ((Oscctrl *)hw)->XOSCCTRL.reg &= ~mask;
936 OSCCTRL_CRITICAL_SECTION_LEAVE();
937 }
938
hri_oscctrl_toggle_XOSCCTRL_reg(const void * const hw,hri_oscctrl_xoscctrl_reg_t mask)939 static inline void hri_oscctrl_toggle_XOSCCTRL_reg(const void *const hw, hri_oscctrl_xoscctrl_reg_t mask)
940 {
941 OSCCTRL_CRITICAL_SECTION_ENTER();
942 ((Oscctrl *)hw)->XOSCCTRL.reg ^= mask;
943 OSCCTRL_CRITICAL_SECTION_LEAVE();
944 }
945
hri_oscctrl_read_XOSCCTRL_reg(const void * const hw)946 static inline hri_oscctrl_xoscctrl_reg_t hri_oscctrl_read_XOSCCTRL_reg(const void *const hw)
947 {
948 return ((Oscctrl *)hw)->XOSCCTRL.reg;
949 }
950
hri_oscctrl_set_OSC16MCTRL_ENABLE_bit(const void * const hw)951 static inline void hri_oscctrl_set_OSC16MCTRL_ENABLE_bit(const void *const hw)
952 {
953 OSCCTRL_CRITICAL_SECTION_ENTER();
954 ((Oscctrl *)hw)->OSC16MCTRL.reg |= OSCCTRL_OSC16MCTRL_ENABLE;
955 OSCCTRL_CRITICAL_SECTION_LEAVE();
956 }
957
hri_oscctrl_get_OSC16MCTRL_ENABLE_bit(const void * const hw)958 static inline bool hri_oscctrl_get_OSC16MCTRL_ENABLE_bit(const void *const hw)
959 {
960 uint8_t tmp;
961 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
962 tmp = (tmp & OSCCTRL_OSC16MCTRL_ENABLE) >> OSCCTRL_OSC16MCTRL_ENABLE_Pos;
963 return (bool)tmp;
964 }
965
hri_oscctrl_write_OSC16MCTRL_ENABLE_bit(const void * const hw,bool value)966 static inline void hri_oscctrl_write_OSC16MCTRL_ENABLE_bit(const void *const hw, bool value)
967 {
968 uint8_t tmp;
969 OSCCTRL_CRITICAL_SECTION_ENTER();
970 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
971 tmp &= ~OSCCTRL_OSC16MCTRL_ENABLE;
972 tmp |= value << OSCCTRL_OSC16MCTRL_ENABLE_Pos;
973 ((Oscctrl *)hw)->OSC16MCTRL.reg = tmp;
974 OSCCTRL_CRITICAL_SECTION_LEAVE();
975 }
976
hri_oscctrl_clear_OSC16MCTRL_ENABLE_bit(const void * const hw)977 static inline void hri_oscctrl_clear_OSC16MCTRL_ENABLE_bit(const void *const hw)
978 {
979 OSCCTRL_CRITICAL_SECTION_ENTER();
980 ((Oscctrl *)hw)->OSC16MCTRL.reg &= ~OSCCTRL_OSC16MCTRL_ENABLE;
981 OSCCTRL_CRITICAL_SECTION_LEAVE();
982 }
983
hri_oscctrl_toggle_OSC16MCTRL_ENABLE_bit(const void * const hw)984 static inline void hri_oscctrl_toggle_OSC16MCTRL_ENABLE_bit(const void *const hw)
985 {
986 OSCCTRL_CRITICAL_SECTION_ENTER();
987 ((Oscctrl *)hw)->OSC16MCTRL.reg ^= OSCCTRL_OSC16MCTRL_ENABLE;
988 OSCCTRL_CRITICAL_SECTION_LEAVE();
989 }
990
hri_oscctrl_set_OSC16MCTRL_RUNSTDBY_bit(const void * const hw)991 static inline void hri_oscctrl_set_OSC16MCTRL_RUNSTDBY_bit(const void *const hw)
992 {
993 OSCCTRL_CRITICAL_SECTION_ENTER();
994 ((Oscctrl *)hw)->OSC16MCTRL.reg |= OSCCTRL_OSC16MCTRL_RUNSTDBY;
995 OSCCTRL_CRITICAL_SECTION_LEAVE();
996 }
997
hri_oscctrl_get_OSC16MCTRL_RUNSTDBY_bit(const void * const hw)998 static inline bool hri_oscctrl_get_OSC16MCTRL_RUNSTDBY_bit(const void *const hw)
999 {
1000 uint8_t tmp;
1001 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1002 tmp = (tmp & OSCCTRL_OSC16MCTRL_RUNSTDBY) >> OSCCTRL_OSC16MCTRL_RUNSTDBY_Pos;
1003 return (bool)tmp;
1004 }
1005
hri_oscctrl_write_OSC16MCTRL_RUNSTDBY_bit(const void * const hw,bool value)1006 static inline void hri_oscctrl_write_OSC16MCTRL_RUNSTDBY_bit(const void *const hw, bool value)
1007 {
1008 uint8_t tmp;
1009 OSCCTRL_CRITICAL_SECTION_ENTER();
1010 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1011 tmp &= ~OSCCTRL_OSC16MCTRL_RUNSTDBY;
1012 tmp |= value << OSCCTRL_OSC16MCTRL_RUNSTDBY_Pos;
1013 ((Oscctrl *)hw)->OSC16MCTRL.reg = tmp;
1014 OSCCTRL_CRITICAL_SECTION_LEAVE();
1015 }
1016
hri_oscctrl_clear_OSC16MCTRL_RUNSTDBY_bit(const void * const hw)1017 static inline void hri_oscctrl_clear_OSC16MCTRL_RUNSTDBY_bit(const void *const hw)
1018 {
1019 OSCCTRL_CRITICAL_SECTION_ENTER();
1020 ((Oscctrl *)hw)->OSC16MCTRL.reg &= ~OSCCTRL_OSC16MCTRL_RUNSTDBY;
1021 OSCCTRL_CRITICAL_SECTION_LEAVE();
1022 }
1023
hri_oscctrl_toggle_OSC16MCTRL_RUNSTDBY_bit(const void * const hw)1024 static inline void hri_oscctrl_toggle_OSC16MCTRL_RUNSTDBY_bit(const void *const hw)
1025 {
1026 OSCCTRL_CRITICAL_SECTION_ENTER();
1027 ((Oscctrl *)hw)->OSC16MCTRL.reg ^= OSCCTRL_OSC16MCTRL_RUNSTDBY;
1028 OSCCTRL_CRITICAL_SECTION_LEAVE();
1029 }
1030
hri_oscctrl_set_OSC16MCTRL_ONDEMAND_bit(const void * const hw)1031 static inline void hri_oscctrl_set_OSC16MCTRL_ONDEMAND_bit(const void *const hw)
1032 {
1033 OSCCTRL_CRITICAL_SECTION_ENTER();
1034 ((Oscctrl *)hw)->OSC16MCTRL.reg |= OSCCTRL_OSC16MCTRL_ONDEMAND;
1035 OSCCTRL_CRITICAL_SECTION_LEAVE();
1036 }
1037
hri_oscctrl_get_OSC16MCTRL_ONDEMAND_bit(const void * const hw)1038 static inline bool hri_oscctrl_get_OSC16MCTRL_ONDEMAND_bit(const void *const hw)
1039 {
1040 uint8_t tmp;
1041 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1042 tmp = (tmp & OSCCTRL_OSC16MCTRL_ONDEMAND) >> OSCCTRL_OSC16MCTRL_ONDEMAND_Pos;
1043 return (bool)tmp;
1044 }
1045
hri_oscctrl_write_OSC16MCTRL_ONDEMAND_bit(const void * const hw,bool value)1046 static inline void hri_oscctrl_write_OSC16MCTRL_ONDEMAND_bit(const void *const hw, bool value)
1047 {
1048 uint8_t tmp;
1049 OSCCTRL_CRITICAL_SECTION_ENTER();
1050 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1051 tmp &= ~OSCCTRL_OSC16MCTRL_ONDEMAND;
1052 tmp |= value << OSCCTRL_OSC16MCTRL_ONDEMAND_Pos;
1053 ((Oscctrl *)hw)->OSC16MCTRL.reg = tmp;
1054 OSCCTRL_CRITICAL_SECTION_LEAVE();
1055 }
1056
hri_oscctrl_clear_OSC16MCTRL_ONDEMAND_bit(const void * const hw)1057 static inline void hri_oscctrl_clear_OSC16MCTRL_ONDEMAND_bit(const void *const hw)
1058 {
1059 OSCCTRL_CRITICAL_SECTION_ENTER();
1060 ((Oscctrl *)hw)->OSC16MCTRL.reg &= ~OSCCTRL_OSC16MCTRL_ONDEMAND;
1061 OSCCTRL_CRITICAL_SECTION_LEAVE();
1062 }
1063
hri_oscctrl_toggle_OSC16MCTRL_ONDEMAND_bit(const void * const hw)1064 static inline void hri_oscctrl_toggle_OSC16MCTRL_ONDEMAND_bit(const void *const hw)
1065 {
1066 OSCCTRL_CRITICAL_SECTION_ENTER();
1067 ((Oscctrl *)hw)->OSC16MCTRL.reg ^= OSCCTRL_OSC16MCTRL_ONDEMAND;
1068 OSCCTRL_CRITICAL_SECTION_LEAVE();
1069 }
1070
hri_oscctrl_set_OSC16MCTRL_FSEL_bf(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1071 static inline void hri_oscctrl_set_OSC16MCTRL_FSEL_bf(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1072 {
1073 OSCCTRL_CRITICAL_SECTION_ENTER();
1074 ((Oscctrl *)hw)->OSC16MCTRL.reg |= OSCCTRL_OSC16MCTRL_FSEL(mask);
1075 OSCCTRL_CRITICAL_SECTION_LEAVE();
1076 }
1077
hri_oscctrl_get_OSC16MCTRL_FSEL_bf(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1078 static inline hri_oscctrl_osc16mctrl_reg_t hri_oscctrl_get_OSC16MCTRL_FSEL_bf(const void *const hw,
1079 hri_oscctrl_osc16mctrl_reg_t mask)
1080 {
1081 uint8_t tmp;
1082 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1083 tmp = (tmp & OSCCTRL_OSC16MCTRL_FSEL(mask)) >> OSCCTRL_OSC16MCTRL_FSEL_Pos;
1084 return tmp;
1085 }
1086
hri_oscctrl_write_OSC16MCTRL_FSEL_bf(const void * const hw,hri_oscctrl_osc16mctrl_reg_t data)1087 static inline void hri_oscctrl_write_OSC16MCTRL_FSEL_bf(const void *const hw, hri_oscctrl_osc16mctrl_reg_t data)
1088 {
1089 uint8_t tmp;
1090 OSCCTRL_CRITICAL_SECTION_ENTER();
1091 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1092 tmp &= ~OSCCTRL_OSC16MCTRL_FSEL_Msk;
1093 tmp |= OSCCTRL_OSC16MCTRL_FSEL(data);
1094 ((Oscctrl *)hw)->OSC16MCTRL.reg = tmp;
1095 OSCCTRL_CRITICAL_SECTION_LEAVE();
1096 }
1097
hri_oscctrl_clear_OSC16MCTRL_FSEL_bf(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1098 static inline void hri_oscctrl_clear_OSC16MCTRL_FSEL_bf(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1099 {
1100 OSCCTRL_CRITICAL_SECTION_ENTER();
1101 ((Oscctrl *)hw)->OSC16MCTRL.reg &= ~OSCCTRL_OSC16MCTRL_FSEL(mask);
1102 OSCCTRL_CRITICAL_SECTION_LEAVE();
1103 }
1104
hri_oscctrl_toggle_OSC16MCTRL_FSEL_bf(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1105 static inline void hri_oscctrl_toggle_OSC16MCTRL_FSEL_bf(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1106 {
1107 OSCCTRL_CRITICAL_SECTION_ENTER();
1108 ((Oscctrl *)hw)->OSC16MCTRL.reg ^= OSCCTRL_OSC16MCTRL_FSEL(mask);
1109 OSCCTRL_CRITICAL_SECTION_LEAVE();
1110 }
1111
hri_oscctrl_read_OSC16MCTRL_FSEL_bf(const void * const hw)1112 static inline hri_oscctrl_osc16mctrl_reg_t hri_oscctrl_read_OSC16MCTRL_FSEL_bf(const void *const hw)
1113 {
1114 uint8_t tmp;
1115 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1116 tmp = (tmp & OSCCTRL_OSC16MCTRL_FSEL_Msk) >> OSCCTRL_OSC16MCTRL_FSEL_Pos;
1117 return tmp;
1118 }
1119
hri_oscctrl_set_OSC16MCTRL_reg(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1120 static inline void hri_oscctrl_set_OSC16MCTRL_reg(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1121 {
1122 OSCCTRL_CRITICAL_SECTION_ENTER();
1123 ((Oscctrl *)hw)->OSC16MCTRL.reg |= mask;
1124 OSCCTRL_CRITICAL_SECTION_LEAVE();
1125 }
1126
hri_oscctrl_get_OSC16MCTRL_reg(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1127 static inline hri_oscctrl_osc16mctrl_reg_t hri_oscctrl_get_OSC16MCTRL_reg(const void *const hw,
1128 hri_oscctrl_osc16mctrl_reg_t mask)
1129 {
1130 uint8_t tmp;
1131 tmp = ((Oscctrl *)hw)->OSC16MCTRL.reg;
1132 tmp &= mask;
1133 return tmp;
1134 }
1135
hri_oscctrl_write_OSC16MCTRL_reg(const void * const hw,hri_oscctrl_osc16mctrl_reg_t data)1136 static inline void hri_oscctrl_write_OSC16MCTRL_reg(const void *const hw, hri_oscctrl_osc16mctrl_reg_t data)
1137 {
1138 OSCCTRL_CRITICAL_SECTION_ENTER();
1139 ((Oscctrl *)hw)->OSC16MCTRL.reg = data;
1140 OSCCTRL_CRITICAL_SECTION_LEAVE();
1141 }
1142
hri_oscctrl_clear_OSC16MCTRL_reg(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1143 static inline void hri_oscctrl_clear_OSC16MCTRL_reg(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1144 {
1145 OSCCTRL_CRITICAL_SECTION_ENTER();
1146 ((Oscctrl *)hw)->OSC16MCTRL.reg &= ~mask;
1147 OSCCTRL_CRITICAL_SECTION_LEAVE();
1148 }
1149
hri_oscctrl_toggle_OSC16MCTRL_reg(const void * const hw,hri_oscctrl_osc16mctrl_reg_t mask)1150 static inline void hri_oscctrl_toggle_OSC16MCTRL_reg(const void *const hw, hri_oscctrl_osc16mctrl_reg_t mask)
1151 {
1152 OSCCTRL_CRITICAL_SECTION_ENTER();
1153 ((Oscctrl *)hw)->OSC16MCTRL.reg ^= mask;
1154 OSCCTRL_CRITICAL_SECTION_LEAVE();
1155 }
1156
hri_oscctrl_read_OSC16MCTRL_reg(const void * const hw)1157 static inline hri_oscctrl_osc16mctrl_reg_t hri_oscctrl_read_OSC16MCTRL_reg(const void *const hw)
1158 {
1159 return ((Oscctrl *)hw)->OSC16MCTRL.reg;
1160 }
1161
hri_oscctrl_set_DFLLCTRL_ENABLE_bit(const void * const hw)1162 static inline void hri_oscctrl_set_DFLLCTRL_ENABLE_bit(const void *const hw)
1163 {
1164 OSCCTRL_CRITICAL_SECTION_ENTER();
1165 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_ENABLE;
1166 OSCCTRL_CRITICAL_SECTION_LEAVE();
1167 }
1168
hri_oscctrl_get_DFLLCTRL_ENABLE_bit(const void * const hw)1169 static inline bool hri_oscctrl_get_DFLLCTRL_ENABLE_bit(const void *const hw)
1170 {
1171 uint16_t tmp;
1172 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1173 tmp = (tmp & OSCCTRL_DFLLCTRL_ENABLE) >> OSCCTRL_DFLLCTRL_ENABLE_Pos;
1174 return (bool)tmp;
1175 }
1176
hri_oscctrl_write_DFLLCTRL_ENABLE_bit(const void * const hw,bool value)1177 static inline void hri_oscctrl_write_DFLLCTRL_ENABLE_bit(const void *const hw, bool value)
1178 {
1179 uint16_t tmp;
1180 OSCCTRL_CRITICAL_SECTION_ENTER();
1181 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1182 tmp &= ~OSCCTRL_DFLLCTRL_ENABLE;
1183 tmp |= value << OSCCTRL_DFLLCTRL_ENABLE_Pos;
1184 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1185 OSCCTRL_CRITICAL_SECTION_LEAVE();
1186 }
1187
hri_oscctrl_clear_DFLLCTRL_ENABLE_bit(const void * const hw)1188 static inline void hri_oscctrl_clear_DFLLCTRL_ENABLE_bit(const void *const hw)
1189 {
1190 OSCCTRL_CRITICAL_SECTION_ENTER();
1191 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_ENABLE;
1192 OSCCTRL_CRITICAL_SECTION_LEAVE();
1193 }
1194
hri_oscctrl_toggle_DFLLCTRL_ENABLE_bit(const void * const hw)1195 static inline void hri_oscctrl_toggle_DFLLCTRL_ENABLE_bit(const void *const hw)
1196 {
1197 OSCCTRL_CRITICAL_SECTION_ENTER();
1198 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_ENABLE;
1199 OSCCTRL_CRITICAL_SECTION_LEAVE();
1200 }
1201
hri_oscctrl_set_DFLLCTRL_MODE_bit(const void * const hw)1202 static inline void hri_oscctrl_set_DFLLCTRL_MODE_bit(const void *const hw)
1203 {
1204 OSCCTRL_CRITICAL_SECTION_ENTER();
1205 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_MODE;
1206 OSCCTRL_CRITICAL_SECTION_LEAVE();
1207 }
1208
hri_oscctrl_get_DFLLCTRL_MODE_bit(const void * const hw)1209 static inline bool hri_oscctrl_get_DFLLCTRL_MODE_bit(const void *const hw)
1210 {
1211 uint16_t tmp;
1212 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1213 tmp = (tmp & OSCCTRL_DFLLCTRL_MODE) >> OSCCTRL_DFLLCTRL_MODE_Pos;
1214 return (bool)tmp;
1215 }
1216
hri_oscctrl_write_DFLLCTRL_MODE_bit(const void * const hw,bool value)1217 static inline void hri_oscctrl_write_DFLLCTRL_MODE_bit(const void *const hw, bool value)
1218 {
1219 uint16_t tmp;
1220 OSCCTRL_CRITICAL_SECTION_ENTER();
1221 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1222 tmp &= ~OSCCTRL_DFLLCTRL_MODE;
1223 tmp |= value << OSCCTRL_DFLLCTRL_MODE_Pos;
1224 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1225 OSCCTRL_CRITICAL_SECTION_LEAVE();
1226 }
1227
hri_oscctrl_clear_DFLLCTRL_MODE_bit(const void * const hw)1228 static inline void hri_oscctrl_clear_DFLLCTRL_MODE_bit(const void *const hw)
1229 {
1230 OSCCTRL_CRITICAL_SECTION_ENTER();
1231 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_MODE;
1232 OSCCTRL_CRITICAL_SECTION_LEAVE();
1233 }
1234
hri_oscctrl_toggle_DFLLCTRL_MODE_bit(const void * const hw)1235 static inline void hri_oscctrl_toggle_DFLLCTRL_MODE_bit(const void *const hw)
1236 {
1237 OSCCTRL_CRITICAL_SECTION_ENTER();
1238 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_MODE;
1239 OSCCTRL_CRITICAL_SECTION_LEAVE();
1240 }
1241
hri_oscctrl_set_DFLLCTRL_STABLE_bit(const void * const hw)1242 static inline void hri_oscctrl_set_DFLLCTRL_STABLE_bit(const void *const hw)
1243 {
1244 OSCCTRL_CRITICAL_SECTION_ENTER();
1245 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_STABLE;
1246 OSCCTRL_CRITICAL_SECTION_LEAVE();
1247 }
1248
hri_oscctrl_get_DFLLCTRL_STABLE_bit(const void * const hw)1249 static inline bool hri_oscctrl_get_DFLLCTRL_STABLE_bit(const void *const hw)
1250 {
1251 uint16_t tmp;
1252 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1253 tmp = (tmp & OSCCTRL_DFLLCTRL_STABLE) >> OSCCTRL_DFLLCTRL_STABLE_Pos;
1254 return (bool)tmp;
1255 }
1256
hri_oscctrl_write_DFLLCTRL_STABLE_bit(const void * const hw,bool value)1257 static inline void hri_oscctrl_write_DFLLCTRL_STABLE_bit(const void *const hw, bool value)
1258 {
1259 uint16_t tmp;
1260 OSCCTRL_CRITICAL_SECTION_ENTER();
1261 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1262 tmp &= ~OSCCTRL_DFLLCTRL_STABLE;
1263 tmp |= value << OSCCTRL_DFLLCTRL_STABLE_Pos;
1264 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1265 OSCCTRL_CRITICAL_SECTION_LEAVE();
1266 }
1267
hri_oscctrl_clear_DFLLCTRL_STABLE_bit(const void * const hw)1268 static inline void hri_oscctrl_clear_DFLLCTRL_STABLE_bit(const void *const hw)
1269 {
1270 OSCCTRL_CRITICAL_SECTION_ENTER();
1271 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_STABLE;
1272 OSCCTRL_CRITICAL_SECTION_LEAVE();
1273 }
1274
hri_oscctrl_toggle_DFLLCTRL_STABLE_bit(const void * const hw)1275 static inline void hri_oscctrl_toggle_DFLLCTRL_STABLE_bit(const void *const hw)
1276 {
1277 OSCCTRL_CRITICAL_SECTION_ENTER();
1278 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_STABLE;
1279 OSCCTRL_CRITICAL_SECTION_LEAVE();
1280 }
1281
hri_oscctrl_set_DFLLCTRL_LLAW_bit(const void * const hw)1282 static inline void hri_oscctrl_set_DFLLCTRL_LLAW_bit(const void *const hw)
1283 {
1284 OSCCTRL_CRITICAL_SECTION_ENTER();
1285 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_LLAW;
1286 OSCCTRL_CRITICAL_SECTION_LEAVE();
1287 }
1288
hri_oscctrl_get_DFLLCTRL_LLAW_bit(const void * const hw)1289 static inline bool hri_oscctrl_get_DFLLCTRL_LLAW_bit(const void *const hw)
1290 {
1291 uint16_t tmp;
1292 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1293 tmp = (tmp & OSCCTRL_DFLLCTRL_LLAW) >> OSCCTRL_DFLLCTRL_LLAW_Pos;
1294 return (bool)tmp;
1295 }
1296
hri_oscctrl_write_DFLLCTRL_LLAW_bit(const void * const hw,bool value)1297 static inline void hri_oscctrl_write_DFLLCTRL_LLAW_bit(const void *const hw, bool value)
1298 {
1299 uint16_t tmp;
1300 OSCCTRL_CRITICAL_SECTION_ENTER();
1301 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1302 tmp &= ~OSCCTRL_DFLLCTRL_LLAW;
1303 tmp |= value << OSCCTRL_DFLLCTRL_LLAW_Pos;
1304 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1305 OSCCTRL_CRITICAL_SECTION_LEAVE();
1306 }
1307
hri_oscctrl_clear_DFLLCTRL_LLAW_bit(const void * const hw)1308 static inline void hri_oscctrl_clear_DFLLCTRL_LLAW_bit(const void *const hw)
1309 {
1310 OSCCTRL_CRITICAL_SECTION_ENTER();
1311 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_LLAW;
1312 OSCCTRL_CRITICAL_SECTION_LEAVE();
1313 }
1314
hri_oscctrl_toggle_DFLLCTRL_LLAW_bit(const void * const hw)1315 static inline void hri_oscctrl_toggle_DFLLCTRL_LLAW_bit(const void *const hw)
1316 {
1317 OSCCTRL_CRITICAL_SECTION_ENTER();
1318 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_LLAW;
1319 OSCCTRL_CRITICAL_SECTION_LEAVE();
1320 }
1321
hri_oscctrl_set_DFLLCTRL_USBCRM_bit(const void * const hw)1322 static inline void hri_oscctrl_set_DFLLCTRL_USBCRM_bit(const void *const hw)
1323 {
1324 OSCCTRL_CRITICAL_SECTION_ENTER();
1325 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_USBCRM;
1326 OSCCTRL_CRITICAL_SECTION_LEAVE();
1327 }
1328
hri_oscctrl_get_DFLLCTRL_USBCRM_bit(const void * const hw)1329 static inline bool hri_oscctrl_get_DFLLCTRL_USBCRM_bit(const void *const hw)
1330 {
1331 uint16_t tmp;
1332 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1333 tmp = (tmp & OSCCTRL_DFLLCTRL_USBCRM) >> OSCCTRL_DFLLCTRL_USBCRM_Pos;
1334 return (bool)tmp;
1335 }
1336
hri_oscctrl_write_DFLLCTRL_USBCRM_bit(const void * const hw,bool value)1337 static inline void hri_oscctrl_write_DFLLCTRL_USBCRM_bit(const void *const hw, bool value)
1338 {
1339 uint16_t tmp;
1340 OSCCTRL_CRITICAL_SECTION_ENTER();
1341 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1342 tmp &= ~OSCCTRL_DFLLCTRL_USBCRM;
1343 tmp |= value << OSCCTRL_DFLLCTRL_USBCRM_Pos;
1344 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1345 OSCCTRL_CRITICAL_SECTION_LEAVE();
1346 }
1347
hri_oscctrl_clear_DFLLCTRL_USBCRM_bit(const void * const hw)1348 static inline void hri_oscctrl_clear_DFLLCTRL_USBCRM_bit(const void *const hw)
1349 {
1350 OSCCTRL_CRITICAL_SECTION_ENTER();
1351 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_USBCRM;
1352 OSCCTRL_CRITICAL_SECTION_LEAVE();
1353 }
1354
hri_oscctrl_toggle_DFLLCTRL_USBCRM_bit(const void * const hw)1355 static inline void hri_oscctrl_toggle_DFLLCTRL_USBCRM_bit(const void *const hw)
1356 {
1357 OSCCTRL_CRITICAL_SECTION_ENTER();
1358 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_USBCRM;
1359 OSCCTRL_CRITICAL_SECTION_LEAVE();
1360 }
1361
hri_oscctrl_set_DFLLCTRL_RUNSTDBY_bit(const void * const hw)1362 static inline void hri_oscctrl_set_DFLLCTRL_RUNSTDBY_bit(const void *const hw)
1363 {
1364 OSCCTRL_CRITICAL_SECTION_ENTER();
1365 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_RUNSTDBY;
1366 OSCCTRL_CRITICAL_SECTION_LEAVE();
1367 }
1368
hri_oscctrl_get_DFLLCTRL_RUNSTDBY_bit(const void * const hw)1369 static inline bool hri_oscctrl_get_DFLLCTRL_RUNSTDBY_bit(const void *const hw)
1370 {
1371 uint16_t tmp;
1372 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1373 tmp = (tmp & OSCCTRL_DFLLCTRL_RUNSTDBY) >> OSCCTRL_DFLLCTRL_RUNSTDBY_Pos;
1374 return (bool)tmp;
1375 }
1376
hri_oscctrl_write_DFLLCTRL_RUNSTDBY_bit(const void * const hw,bool value)1377 static inline void hri_oscctrl_write_DFLLCTRL_RUNSTDBY_bit(const void *const hw, bool value)
1378 {
1379 uint16_t tmp;
1380 OSCCTRL_CRITICAL_SECTION_ENTER();
1381 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1382 tmp &= ~OSCCTRL_DFLLCTRL_RUNSTDBY;
1383 tmp |= value << OSCCTRL_DFLLCTRL_RUNSTDBY_Pos;
1384 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1385 OSCCTRL_CRITICAL_SECTION_LEAVE();
1386 }
1387
hri_oscctrl_clear_DFLLCTRL_RUNSTDBY_bit(const void * const hw)1388 static inline void hri_oscctrl_clear_DFLLCTRL_RUNSTDBY_bit(const void *const hw)
1389 {
1390 OSCCTRL_CRITICAL_SECTION_ENTER();
1391 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_RUNSTDBY;
1392 OSCCTRL_CRITICAL_SECTION_LEAVE();
1393 }
1394
hri_oscctrl_toggle_DFLLCTRL_RUNSTDBY_bit(const void * const hw)1395 static inline void hri_oscctrl_toggle_DFLLCTRL_RUNSTDBY_bit(const void *const hw)
1396 {
1397 OSCCTRL_CRITICAL_SECTION_ENTER();
1398 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_RUNSTDBY;
1399 OSCCTRL_CRITICAL_SECTION_LEAVE();
1400 }
1401
hri_oscctrl_set_DFLLCTRL_ONDEMAND_bit(const void * const hw)1402 static inline void hri_oscctrl_set_DFLLCTRL_ONDEMAND_bit(const void *const hw)
1403 {
1404 OSCCTRL_CRITICAL_SECTION_ENTER();
1405 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_ONDEMAND;
1406 OSCCTRL_CRITICAL_SECTION_LEAVE();
1407 }
1408
hri_oscctrl_get_DFLLCTRL_ONDEMAND_bit(const void * const hw)1409 static inline bool hri_oscctrl_get_DFLLCTRL_ONDEMAND_bit(const void *const hw)
1410 {
1411 uint16_t tmp;
1412 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1413 tmp = (tmp & OSCCTRL_DFLLCTRL_ONDEMAND) >> OSCCTRL_DFLLCTRL_ONDEMAND_Pos;
1414 return (bool)tmp;
1415 }
1416
hri_oscctrl_write_DFLLCTRL_ONDEMAND_bit(const void * const hw,bool value)1417 static inline void hri_oscctrl_write_DFLLCTRL_ONDEMAND_bit(const void *const hw, bool value)
1418 {
1419 uint16_t tmp;
1420 OSCCTRL_CRITICAL_SECTION_ENTER();
1421 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1422 tmp &= ~OSCCTRL_DFLLCTRL_ONDEMAND;
1423 tmp |= value << OSCCTRL_DFLLCTRL_ONDEMAND_Pos;
1424 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1425 OSCCTRL_CRITICAL_SECTION_LEAVE();
1426 }
1427
hri_oscctrl_clear_DFLLCTRL_ONDEMAND_bit(const void * const hw)1428 static inline void hri_oscctrl_clear_DFLLCTRL_ONDEMAND_bit(const void *const hw)
1429 {
1430 OSCCTRL_CRITICAL_SECTION_ENTER();
1431 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_ONDEMAND;
1432 OSCCTRL_CRITICAL_SECTION_LEAVE();
1433 }
1434
hri_oscctrl_toggle_DFLLCTRL_ONDEMAND_bit(const void * const hw)1435 static inline void hri_oscctrl_toggle_DFLLCTRL_ONDEMAND_bit(const void *const hw)
1436 {
1437 OSCCTRL_CRITICAL_SECTION_ENTER();
1438 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_ONDEMAND;
1439 OSCCTRL_CRITICAL_SECTION_LEAVE();
1440 }
1441
hri_oscctrl_set_DFLLCTRL_CCDIS_bit(const void * const hw)1442 static inline void hri_oscctrl_set_DFLLCTRL_CCDIS_bit(const void *const hw)
1443 {
1444 OSCCTRL_CRITICAL_SECTION_ENTER();
1445 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_CCDIS;
1446 OSCCTRL_CRITICAL_SECTION_LEAVE();
1447 }
1448
hri_oscctrl_get_DFLLCTRL_CCDIS_bit(const void * const hw)1449 static inline bool hri_oscctrl_get_DFLLCTRL_CCDIS_bit(const void *const hw)
1450 {
1451 uint16_t tmp;
1452 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1453 tmp = (tmp & OSCCTRL_DFLLCTRL_CCDIS) >> OSCCTRL_DFLLCTRL_CCDIS_Pos;
1454 return (bool)tmp;
1455 }
1456
hri_oscctrl_write_DFLLCTRL_CCDIS_bit(const void * const hw,bool value)1457 static inline void hri_oscctrl_write_DFLLCTRL_CCDIS_bit(const void *const hw, bool value)
1458 {
1459 uint16_t tmp;
1460 OSCCTRL_CRITICAL_SECTION_ENTER();
1461 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1462 tmp &= ~OSCCTRL_DFLLCTRL_CCDIS;
1463 tmp |= value << OSCCTRL_DFLLCTRL_CCDIS_Pos;
1464 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1465 OSCCTRL_CRITICAL_SECTION_LEAVE();
1466 }
1467
hri_oscctrl_clear_DFLLCTRL_CCDIS_bit(const void * const hw)1468 static inline void hri_oscctrl_clear_DFLLCTRL_CCDIS_bit(const void *const hw)
1469 {
1470 OSCCTRL_CRITICAL_SECTION_ENTER();
1471 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_CCDIS;
1472 OSCCTRL_CRITICAL_SECTION_LEAVE();
1473 }
1474
hri_oscctrl_toggle_DFLLCTRL_CCDIS_bit(const void * const hw)1475 static inline void hri_oscctrl_toggle_DFLLCTRL_CCDIS_bit(const void *const hw)
1476 {
1477 OSCCTRL_CRITICAL_SECTION_ENTER();
1478 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_CCDIS;
1479 OSCCTRL_CRITICAL_SECTION_LEAVE();
1480 }
1481
hri_oscctrl_set_DFLLCTRL_QLDIS_bit(const void * const hw)1482 static inline void hri_oscctrl_set_DFLLCTRL_QLDIS_bit(const void *const hw)
1483 {
1484 OSCCTRL_CRITICAL_SECTION_ENTER();
1485 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_QLDIS;
1486 OSCCTRL_CRITICAL_SECTION_LEAVE();
1487 }
1488
hri_oscctrl_get_DFLLCTRL_QLDIS_bit(const void * const hw)1489 static inline bool hri_oscctrl_get_DFLLCTRL_QLDIS_bit(const void *const hw)
1490 {
1491 uint16_t tmp;
1492 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1493 tmp = (tmp & OSCCTRL_DFLLCTRL_QLDIS) >> OSCCTRL_DFLLCTRL_QLDIS_Pos;
1494 return (bool)tmp;
1495 }
1496
hri_oscctrl_write_DFLLCTRL_QLDIS_bit(const void * const hw,bool value)1497 static inline void hri_oscctrl_write_DFLLCTRL_QLDIS_bit(const void *const hw, bool value)
1498 {
1499 uint16_t tmp;
1500 OSCCTRL_CRITICAL_SECTION_ENTER();
1501 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1502 tmp &= ~OSCCTRL_DFLLCTRL_QLDIS;
1503 tmp |= value << OSCCTRL_DFLLCTRL_QLDIS_Pos;
1504 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1505 OSCCTRL_CRITICAL_SECTION_LEAVE();
1506 }
1507
hri_oscctrl_clear_DFLLCTRL_QLDIS_bit(const void * const hw)1508 static inline void hri_oscctrl_clear_DFLLCTRL_QLDIS_bit(const void *const hw)
1509 {
1510 OSCCTRL_CRITICAL_SECTION_ENTER();
1511 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_QLDIS;
1512 OSCCTRL_CRITICAL_SECTION_LEAVE();
1513 }
1514
hri_oscctrl_toggle_DFLLCTRL_QLDIS_bit(const void * const hw)1515 static inline void hri_oscctrl_toggle_DFLLCTRL_QLDIS_bit(const void *const hw)
1516 {
1517 OSCCTRL_CRITICAL_SECTION_ENTER();
1518 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_QLDIS;
1519 OSCCTRL_CRITICAL_SECTION_LEAVE();
1520 }
1521
hri_oscctrl_set_DFLLCTRL_BPLCKC_bit(const void * const hw)1522 static inline void hri_oscctrl_set_DFLLCTRL_BPLCKC_bit(const void *const hw)
1523 {
1524 OSCCTRL_CRITICAL_SECTION_ENTER();
1525 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_BPLCKC;
1526 OSCCTRL_CRITICAL_SECTION_LEAVE();
1527 }
1528
hri_oscctrl_get_DFLLCTRL_BPLCKC_bit(const void * const hw)1529 static inline bool hri_oscctrl_get_DFLLCTRL_BPLCKC_bit(const void *const hw)
1530 {
1531 uint16_t tmp;
1532 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1533 tmp = (tmp & OSCCTRL_DFLLCTRL_BPLCKC) >> OSCCTRL_DFLLCTRL_BPLCKC_Pos;
1534 return (bool)tmp;
1535 }
1536
hri_oscctrl_write_DFLLCTRL_BPLCKC_bit(const void * const hw,bool value)1537 static inline void hri_oscctrl_write_DFLLCTRL_BPLCKC_bit(const void *const hw, bool value)
1538 {
1539 uint16_t tmp;
1540 OSCCTRL_CRITICAL_SECTION_ENTER();
1541 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1542 tmp &= ~OSCCTRL_DFLLCTRL_BPLCKC;
1543 tmp |= value << OSCCTRL_DFLLCTRL_BPLCKC_Pos;
1544 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1545 OSCCTRL_CRITICAL_SECTION_LEAVE();
1546 }
1547
hri_oscctrl_clear_DFLLCTRL_BPLCKC_bit(const void * const hw)1548 static inline void hri_oscctrl_clear_DFLLCTRL_BPLCKC_bit(const void *const hw)
1549 {
1550 OSCCTRL_CRITICAL_SECTION_ENTER();
1551 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_BPLCKC;
1552 OSCCTRL_CRITICAL_SECTION_LEAVE();
1553 }
1554
hri_oscctrl_toggle_DFLLCTRL_BPLCKC_bit(const void * const hw)1555 static inline void hri_oscctrl_toggle_DFLLCTRL_BPLCKC_bit(const void *const hw)
1556 {
1557 OSCCTRL_CRITICAL_SECTION_ENTER();
1558 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_BPLCKC;
1559 OSCCTRL_CRITICAL_SECTION_LEAVE();
1560 }
1561
hri_oscctrl_set_DFLLCTRL_WAITLOCK_bit(const void * const hw)1562 static inline void hri_oscctrl_set_DFLLCTRL_WAITLOCK_bit(const void *const hw)
1563 {
1564 OSCCTRL_CRITICAL_SECTION_ENTER();
1565 ((Oscctrl *)hw)->DFLLCTRL.reg |= OSCCTRL_DFLLCTRL_WAITLOCK;
1566 OSCCTRL_CRITICAL_SECTION_LEAVE();
1567 }
1568
hri_oscctrl_get_DFLLCTRL_WAITLOCK_bit(const void * const hw)1569 static inline bool hri_oscctrl_get_DFLLCTRL_WAITLOCK_bit(const void *const hw)
1570 {
1571 uint16_t tmp;
1572 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1573 tmp = (tmp & OSCCTRL_DFLLCTRL_WAITLOCK) >> OSCCTRL_DFLLCTRL_WAITLOCK_Pos;
1574 return (bool)tmp;
1575 }
1576
hri_oscctrl_write_DFLLCTRL_WAITLOCK_bit(const void * const hw,bool value)1577 static inline void hri_oscctrl_write_DFLLCTRL_WAITLOCK_bit(const void *const hw, bool value)
1578 {
1579 uint16_t tmp;
1580 OSCCTRL_CRITICAL_SECTION_ENTER();
1581 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1582 tmp &= ~OSCCTRL_DFLLCTRL_WAITLOCK;
1583 tmp |= value << OSCCTRL_DFLLCTRL_WAITLOCK_Pos;
1584 ((Oscctrl *)hw)->DFLLCTRL.reg = tmp;
1585 OSCCTRL_CRITICAL_SECTION_LEAVE();
1586 }
1587
hri_oscctrl_clear_DFLLCTRL_WAITLOCK_bit(const void * const hw)1588 static inline void hri_oscctrl_clear_DFLLCTRL_WAITLOCK_bit(const void *const hw)
1589 {
1590 OSCCTRL_CRITICAL_SECTION_ENTER();
1591 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~OSCCTRL_DFLLCTRL_WAITLOCK;
1592 OSCCTRL_CRITICAL_SECTION_LEAVE();
1593 }
1594
hri_oscctrl_toggle_DFLLCTRL_WAITLOCK_bit(const void * const hw)1595 static inline void hri_oscctrl_toggle_DFLLCTRL_WAITLOCK_bit(const void *const hw)
1596 {
1597 OSCCTRL_CRITICAL_SECTION_ENTER();
1598 ((Oscctrl *)hw)->DFLLCTRL.reg ^= OSCCTRL_DFLLCTRL_WAITLOCK;
1599 OSCCTRL_CRITICAL_SECTION_LEAVE();
1600 }
1601
hri_oscctrl_set_DFLLCTRL_reg(const void * const hw,hri_oscctrl_dfllctrl_reg_t mask)1602 static inline void hri_oscctrl_set_DFLLCTRL_reg(const void *const hw, hri_oscctrl_dfllctrl_reg_t mask)
1603 {
1604 OSCCTRL_CRITICAL_SECTION_ENTER();
1605 ((Oscctrl *)hw)->DFLLCTRL.reg |= mask;
1606 OSCCTRL_CRITICAL_SECTION_LEAVE();
1607 }
1608
hri_oscctrl_get_DFLLCTRL_reg(const void * const hw,hri_oscctrl_dfllctrl_reg_t mask)1609 static inline hri_oscctrl_dfllctrl_reg_t hri_oscctrl_get_DFLLCTRL_reg(const void *const hw,
1610 hri_oscctrl_dfllctrl_reg_t mask)
1611 {
1612 uint16_t tmp;
1613 tmp = ((Oscctrl *)hw)->DFLLCTRL.reg;
1614 tmp &= mask;
1615 return tmp;
1616 }
1617
hri_oscctrl_write_DFLLCTRL_reg(const void * const hw,hri_oscctrl_dfllctrl_reg_t data)1618 static inline void hri_oscctrl_write_DFLLCTRL_reg(const void *const hw, hri_oscctrl_dfllctrl_reg_t data)
1619 {
1620 OSCCTRL_CRITICAL_SECTION_ENTER();
1621 ((Oscctrl *)hw)->DFLLCTRL.reg = data;
1622 OSCCTRL_CRITICAL_SECTION_LEAVE();
1623 }
1624
hri_oscctrl_clear_DFLLCTRL_reg(const void * const hw,hri_oscctrl_dfllctrl_reg_t mask)1625 static inline void hri_oscctrl_clear_DFLLCTRL_reg(const void *const hw, hri_oscctrl_dfllctrl_reg_t mask)
1626 {
1627 OSCCTRL_CRITICAL_SECTION_ENTER();
1628 ((Oscctrl *)hw)->DFLLCTRL.reg &= ~mask;
1629 OSCCTRL_CRITICAL_SECTION_LEAVE();
1630 }
1631
hri_oscctrl_toggle_DFLLCTRL_reg(const void * const hw,hri_oscctrl_dfllctrl_reg_t mask)1632 static inline void hri_oscctrl_toggle_DFLLCTRL_reg(const void *const hw, hri_oscctrl_dfllctrl_reg_t mask)
1633 {
1634 OSCCTRL_CRITICAL_SECTION_ENTER();
1635 ((Oscctrl *)hw)->DFLLCTRL.reg ^= mask;
1636 OSCCTRL_CRITICAL_SECTION_LEAVE();
1637 }
1638
hri_oscctrl_read_DFLLCTRL_reg(const void * const hw)1639 static inline hri_oscctrl_dfllctrl_reg_t hri_oscctrl_read_DFLLCTRL_reg(const void *const hw)
1640 {
1641 return ((Oscctrl *)hw)->DFLLCTRL.reg;
1642 }
1643
hri_oscctrl_set_DFLLVAL_FINE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1644 static inline void hri_oscctrl_set_DFLLVAL_FINE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1645 {
1646 OSCCTRL_CRITICAL_SECTION_ENTER();
1647 ((Oscctrl *)hw)->DFLLVAL.reg |= OSCCTRL_DFLLVAL_FINE(mask);
1648 OSCCTRL_CRITICAL_SECTION_LEAVE();
1649 }
1650
hri_oscctrl_get_DFLLVAL_FINE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1651 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_get_DFLLVAL_FINE_bf(const void *const hw,
1652 hri_oscctrl_dfllval_reg_t mask)
1653 {
1654 uint32_t tmp;
1655 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1656 tmp = (tmp & OSCCTRL_DFLLVAL_FINE(mask)) >> OSCCTRL_DFLLVAL_FINE_Pos;
1657 return tmp;
1658 }
1659
hri_oscctrl_write_DFLLVAL_FINE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t data)1660 static inline void hri_oscctrl_write_DFLLVAL_FINE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t data)
1661 {
1662 uint32_t tmp;
1663 OSCCTRL_CRITICAL_SECTION_ENTER();
1664 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1665 tmp &= ~OSCCTRL_DFLLVAL_FINE_Msk;
1666 tmp |= OSCCTRL_DFLLVAL_FINE(data);
1667 ((Oscctrl *)hw)->DFLLVAL.reg = tmp;
1668 OSCCTRL_CRITICAL_SECTION_LEAVE();
1669 }
1670
hri_oscctrl_clear_DFLLVAL_FINE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1671 static inline void hri_oscctrl_clear_DFLLVAL_FINE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1672 {
1673 OSCCTRL_CRITICAL_SECTION_ENTER();
1674 ((Oscctrl *)hw)->DFLLVAL.reg &= ~OSCCTRL_DFLLVAL_FINE(mask);
1675 OSCCTRL_CRITICAL_SECTION_LEAVE();
1676 }
1677
hri_oscctrl_toggle_DFLLVAL_FINE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1678 static inline void hri_oscctrl_toggle_DFLLVAL_FINE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1679 {
1680 OSCCTRL_CRITICAL_SECTION_ENTER();
1681 ((Oscctrl *)hw)->DFLLVAL.reg ^= OSCCTRL_DFLLVAL_FINE(mask);
1682 OSCCTRL_CRITICAL_SECTION_LEAVE();
1683 }
1684
hri_oscctrl_read_DFLLVAL_FINE_bf(const void * const hw)1685 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_read_DFLLVAL_FINE_bf(const void *const hw)
1686 {
1687 uint32_t tmp;
1688 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1689 tmp = (tmp & OSCCTRL_DFLLVAL_FINE_Msk) >> OSCCTRL_DFLLVAL_FINE_Pos;
1690 return tmp;
1691 }
1692
hri_oscctrl_set_DFLLVAL_COARSE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1693 static inline void hri_oscctrl_set_DFLLVAL_COARSE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1694 {
1695 OSCCTRL_CRITICAL_SECTION_ENTER();
1696 ((Oscctrl *)hw)->DFLLVAL.reg |= OSCCTRL_DFLLVAL_COARSE(mask);
1697 OSCCTRL_CRITICAL_SECTION_LEAVE();
1698 }
1699
hri_oscctrl_get_DFLLVAL_COARSE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1700 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_get_DFLLVAL_COARSE_bf(const void *const hw,
1701 hri_oscctrl_dfllval_reg_t mask)
1702 {
1703 uint32_t tmp;
1704 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1705 tmp = (tmp & OSCCTRL_DFLLVAL_COARSE(mask)) >> OSCCTRL_DFLLVAL_COARSE_Pos;
1706 return tmp;
1707 }
1708
hri_oscctrl_write_DFLLVAL_COARSE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t data)1709 static inline void hri_oscctrl_write_DFLLVAL_COARSE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t data)
1710 {
1711 uint32_t tmp;
1712 OSCCTRL_CRITICAL_SECTION_ENTER();
1713 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1714 tmp &= ~OSCCTRL_DFLLVAL_COARSE_Msk;
1715 tmp |= OSCCTRL_DFLLVAL_COARSE(data);
1716 ((Oscctrl *)hw)->DFLLVAL.reg = tmp;
1717 OSCCTRL_CRITICAL_SECTION_LEAVE();
1718 }
1719
hri_oscctrl_clear_DFLLVAL_COARSE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1720 static inline void hri_oscctrl_clear_DFLLVAL_COARSE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1721 {
1722 OSCCTRL_CRITICAL_SECTION_ENTER();
1723 ((Oscctrl *)hw)->DFLLVAL.reg &= ~OSCCTRL_DFLLVAL_COARSE(mask);
1724 OSCCTRL_CRITICAL_SECTION_LEAVE();
1725 }
1726
hri_oscctrl_toggle_DFLLVAL_COARSE_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1727 static inline void hri_oscctrl_toggle_DFLLVAL_COARSE_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1728 {
1729 OSCCTRL_CRITICAL_SECTION_ENTER();
1730 ((Oscctrl *)hw)->DFLLVAL.reg ^= OSCCTRL_DFLLVAL_COARSE(mask);
1731 OSCCTRL_CRITICAL_SECTION_LEAVE();
1732 }
1733
hri_oscctrl_read_DFLLVAL_COARSE_bf(const void * const hw)1734 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_read_DFLLVAL_COARSE_bf(const void *const hw)
1735 {
1736 uint32_t tmp;
1737 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1738 tmp = (tmp & OSCCTRL_DFLLVAL_COARSE_Msk) >> OSCCTRL_DFLLVAL_COARSE_Pos;
1739 return tmp;
1740 }
1741
hri_oscctrl_set_DFLLVAL_DIFF_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1742 static inline void hri_oscctrl_set_DFLLVAL_DIFF_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1743 {
1744 OSCCTRL_CRITICAL_SECTION_ENTER();
1745 ((Oscctrl *)hw)->DFLLVAL.reg |= OSCCTRL_DFLLVAL_DIFF(mask);
1746 OSCCTRL_CRITICAL_SECTION_LEAVE();
1747 }
1748
hri_oscctrl_get_DFLLVAL_DIFF_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1749 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_get_DFLLVAL_DIFF_bf(const void *const hw,
1750 hri_oscctrl_dfllval_reg_t mask)
1751 {
1752 uint32_t tmp;
1753 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1754 tmp = (tmp & OSCCTRL_DFLLVAL_DIFF(mask)) >> OSCCTRL_DFLLVAL_DIFF_Pos;
1755 return tmp;
1756 }
1757
hri_oscctrl_write_DFLLVAL_DIFF_bf(const void * const hw,hri_oscctrl_dfllval_reg_t data)1758 static inline void hri_oscctrl_write_DFLLVAL_DIFF_bf(const void *const hw, hri_oscctrl_dfllval_reg_t data)
1759 {
1760 uint32_t tmp;
1761 OSCCTRL_CRITICAL_SECTION_ENTER();
1762 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1763 tmp &= ~OSCCTRL_DFLLVAL_DIFF_Msk;
1764 tmp |= OSCCTRL_DFLLVAL_DIFF(data);
1765 ((Oscctrl *)hw)->DFLLVAL.reg = tmp;
1766 OSCCTRL_CRITICAL_SECTION_LEAVE();
1767 }
1768
hri_oscctrl_clear_DFLLVAL_DIFF_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1769 static inline void hri_oscctrl_clear_DFLLVAL_DIFF_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1770 {
1771 OSCCTRL_CRITICAL_SECTION_ENTER();
1772 ((Oscctrl *)hw)->DFLLVAL.reg &= ~OSCCTRL_DFLLVAL_DIFF(mask);
1773 OSCCTRL_CRITICAL_SECTION_LEAVE();
1774 }
1775
hri_oscctrl_toggle_DFLLVAL_DIFF_bf(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1776 static inline void hri_oscctrl_toggle_DFLLVAL_DIFF_bf(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1777 {
1778 OSCCTRL_CRITICAL_SECTION_ENTER();
1779 ((Oscctrl *)hw)->DFLLVAL.reg ^= OSCCTRL_DFLLVAL_DIFF(mask);
1780 OSCCTRL_CRITICAL_SECTION_LEAVE();
1781 }
1782
hri_oscctrl_read_DFLLVAL_DIFF_bf(const void * const hw)1783 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_read_DFLLVAL_DIFF_bf(const void *const hw)
1784 {
1785 uint32_t tmp;
1786 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1787 tmp = (tmp & OSCCTRL_DFLLVAL_DIFF_Msk) >> OSCCTRL_DFLLVAL_DIFF_Pos;
1788 return tmp;
1789 }
1790
hri_oscctrl_set_DFLLVAL_reg(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1791 static inline void hri_oscctrl_set_DFLLVAL_reg(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1792 {
1793 OSCCTRL_CRITICAL_SECTION_ENTER();
1794 ((Oscctrl *)hw)->DFLLVAL.reg |= mask;
1795 OSCCTRL_CRITICAL_SECTION_LEAVE();
1796 }
1797
hri_oscctrl_get_DFLLVAL_reg(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1798 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_get_DFLLVAL_reg(const void *const hw,
1799 hri_oscctrl_dfllval_reg_t mask)
1800 {
1801 uint32_t tmp;
1802 tmp = ((Oscctrl *)hw)->DFLLVAL.reg;
1803 tmp &= mask;
1804 return tmp;
1805 }
1806
hri_oscctrl_write_DFLLVAL_reg(const void * const hw,hri_oscctrl_dfllval_reg_t data)1807 static inline void hri_oscctrl_write_DFLLVAL_reg(const void *const hw, hri_oscctrl_dfllval_reg_t data)
1808 {
1809 OSCCTRL_CRITICAL_SECTION_ENTER();
1810 ((Oscctrl *)hw)->DFLLVAL.reg = data;
1811 OSCCTRL_CRITICAL_SECTION_LEAVE();
1812 }
1813
hri_oscctrl_clear_DFLLVAL_reg(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1814 static inline void hri_oscctrl_clear_DFLLVAL_reg(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1815 {
1816 OSCCTRL_CRITICAL_SECTION_ENTER();
1817 ((Oscctrl *)hw)->DFLLVAL.reg &= ~mask;
1818 OSCCTRL_CRITICAL_SECTION_LEAVE();
1819 }
1820
hri_oscctrl_toggle_DFLLVAL_reg(const void * const hw,hri_oscctrl_dfllval_reg_t mask)1821 static inline void hri_oscctrl_toggle_DFLLVAL_reg(const void *const hw, hri_oscctrl_dfllval_reg_t mask)
1822 {
1823 OSCCTRL_CRITICAL_SECTION_ENTER();
1824 ((Oscctrl *)hw)->DFLLVAL.reg ^= mask;
1825 OSCCTRL_CRITICAL_SECTION_LEAVE();
1826 }
1827
hri_oscctrl_read_DFLLVAL_reg(const void * const hw)1828 static inline hri_oscctrl_dfllval_reg_t hri_oscctrl_read_DFLLVAL_reg(const void *const hw)
1829 {
1830 return ((Oscctrl *)hw)->DFLLVAL.reg;
1831 }
1832
hri_oscctrl_set_DFLLMUL_MUL_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1833 static inline void hri_oscctrl_set_DFLLMUL_MUL_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1834 {
1835 OSCCTRL_CRITICAL_SECTION_ENTER();
1836 ((Oscctrl *)hw)->DFLLMUL.reg |= OSCCTRL_DFLLMUL_MUL(mask);
1837 OSCCTRL_CRITICAL_SECTION_LEAVE();
1838 }
1839
hri_oscctrl_get_DFLLMUL_MUL_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1840 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_get_DFLLMUL_MUL_bf(const void *const hw,
1841 hri_oscctrl_dfllmul_reg_t mask)
1842 {
1843 uint32_t tmp;
1844 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1845 tmp = (tmp & OSCCTRL_DFLLMUL_MUL(mask)) >> OSCCTRL_DFLLMUL_MUL_Pos;
1846 return tmp;
1847 }
1848
hri_oscctrl_write_DFLLMUL_MUL_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t data)1849 static inline void hri_oscctrl_write_DFLLMUL_MUL_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t data)
1850 {
1851 uint32_t tmp;
1852 OSCCTRL_CRITICAL_SECTION_ENTER();
1853 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1854 tmp &= ~OSCCTRL_DFLLMUL_MUL_Msk;
1855 tmp |= OSCCTRL_DFLLMUL_MUL(data);
1856 ((Oscctrl *)hw)->DFLLMUL.reg = tmp;
1857 OSCCTRL_CRITICAL_SECTION_LEAVE();
1858 }
1859
hri_oscctrl_clear_DFLLMUL_MUL_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1860 static inline void hri_oscctrl_clear_DFLLMUL_MUL_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1861 {
1862 OSCCTRL_CRITICAL_SECTION_ENTER();
1863 ((Oscctrl *)hw)->DFLLMUL.reg &= ~OSCCTRL_DFLLMUL_MUL(mask);
1864 OSCCTRL_CRITICAL_SECTION_LEAVE();
1865 }
1866
hri_oscctrl_toggle_DFLLMUL_MUL_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1867 static inline void hri_oscctrl_toggle_DFLLMUL_MUL_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1868 {
1869 OSCCTRL_CRITICAL_SECTION_ENTER();
1870 ((Oscctrl *)hw)->DFLLMUL.reg ^= OSCCTRL_DFLLMUL_MUL(mask);
1871 OSCCTRL_CRITICAL_SECTION_LEAVE();
1872 }
1873
hri_oscctrl_read_DFLLMUL_MUL_bf(const void * const hw)1874 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_read_DFLLMUL_MUL_bf(const void *const hw)
1875 {
1876 uint32_t tmp;
1877 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1878 tmp = (tmp & OSCCTRL_DFLLMUL_MUL_Msk) >> OSCCTRL_DFLLMUL_MUL_Pos;
1879 return tmp;
1880 }
1881
hri_oscctrl_set_DFLLMUL_FSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1882 static inline void hri_oscctrl_set_DFLLMUL_FSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1883 {
1884 OSCCTRL_CRITICAL_SECTION_ENTER();
1885 ((Oscctrl *)hw)->DFLLMUL.reg |= OSCCTRL_DFLLMUL_FSTEP(mask);
1886 OSCCTRL_CRITICAL_SECTION_LEAVE();
1887 }
1888
hri_oscctrl_get_DFLLMUL_FSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1889 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_get_DFLLMUL_FSTEP_bf(const void *const hw,
1890 hri_oscctrl_dfllmul_reg_t mask)
1891 {
1892 uint32_t tmp;
1893 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1894 tmp = (tmp & OSCCTRL_DFLLMUL_FSTEP(mask)) >> OSCCTRL_DFLLMUL_FSTEP_Pos;
1895 return tmp;
1896 }
1897
hri_oscctrl_write_DFLLMUL_FSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t data)1898 static inline void hri_oscctrl_write_DFLLMUL_FSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t data)
1899 {
1900 uint32_t tmp;
1901 OSCCTRL_CRITICAL_SECTION_ENTER();
1902 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1903 tmp &= ~OSCCTRL_DFLLMUL_FSTEP_Msk;
1904 tmp |= OSCCTRL_DFLLMUL_FSTEP(data);
1905 ((Oscctrl *)hw)->DFLLMUL.reg = tmp;
1906 OSCCTRL_CRITICAL_SECTION_LEAVE();
1907 }
1908
hri_oscctrl_clear_DFLLMUL_FSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1909 static inline void hri_oscctrl_clear_DFLLMUL_FSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1910 {
1911 OSCCTRL_CRITICAL_SECTION_ENTER();
1912 ((Oscctrl *)hw)->DFLLMUL.reg &= ~OSCCTRL_DFLLMUL_FSTEP(mask);
1913 OSCCTRL_CRITICAL_SECTION_LEAVE();
1914 }
1915
hri_oscctrl_toggle_DFLLMUL_FSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1916 static inline void hri_oscctrl_toggle_DFLLMUL_FSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1917 {
1918 OSCCTRL_CRITICAL_SECTION_ENTER();
1919 ((Oscctrl *)hw)->DFLLMUL.reg ^= OSCCTRL_DFLLMUL_FSTEP(mask);
1920 OSCCTRL_CRITICAL_SECTION_LEAVE();
1921 }
1922
hri_oscctrl_read_DFLLMUL_FSTEP_bf(const void * const hw)1923 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_read_DFLLMUL_FSTEP_bf(const void *const hw)
1924 {
1925 uint32_t tmp;
1926 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1927 tmp = (tmp & OSCCTRL_DFLLMUL_FSTEP_Msk) >> OSCCTRL_DFLLMUL_FSTEP_Pos;
1928 return tmp;
1929 }
1930
hri_oscctrl_set_DFLLMUL_CSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1931 static inline void hri_oscctrl_set_DFLLMUL_CSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1932 {
1933 OSCCTRL_CRITICAL_SECTION_ENTER();
1934 ((Oscctrl *)hw)->DFLLMUL.reg |= OSCCTRL_DFLLMUL_CSTEP(mask);
1935 OSCCTRL_CRITICAL_SECTION_LEAVE();
1936 }
1937
hri_oscctrl_get_DFLLMUL_CSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1938 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_get_DFLLMUL_CSTEP_bf(const void *const hw,
1939 hri_oscctrl_dfllmul_reg_t mask)
1940 {
1941 uint32_t tmp;
1942 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1943 tmp = (tmp & OSCCTRL_DFLLMUL_CSTEP(mask)) >> OSCCTRL_DFLLMUL_CSTEP_Pos;
1944 return tmp;
1945 }
1946
hri_oscctrl_write_DFLLMUL_CSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t data)1947 static inline void hri_oscctrl_write_DFLLMUL_CSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t data)
1948 {
1949 uint32_t tmp;
1950 OSCCTRL_CRITICAL_SECTION_ENTER();
1951 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1952 tmp &= ~OSCCTRL_DFLLMUL_CSTEP_Msk;
1953 tmp |= OSCCTRL_DFLLMUL_CSTEP(data);
1954 ((Oscctrl *)hw)->DFLLMUL.reg = tmp;
1955 OSCCTRL_CRITICAL_SECTION_LEAVE();
1956 }
1957
hri_oscctrl_clear_DFLLMUL_CSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1958 static inline void hri_oscctrl_clear_DFLLMUL_CSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1959 {
1960 OSCCTRL_CRITICAL_SECTION_ENTER();
1961 ((Oscctrl *)hw)->DFLLMUL.reg &= ~OSCCTRL_DFLLMUL_CSTEP(mask);
1962 OSCCTRL_CRITICAL_SECTION_LEAVE();
1963 }
1964
hri_oscctrl_toggle_DFLLMUL_CSTEP_bf(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1965 static inline void hri_oscctrl_toggle_DFLLMUL_CSTEP_bf(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1966 {
1967 OSCCTRL_CRITICAL_SECTION_ENTER();
1968 ((Oscctrl *)hw)->DFLLMUL.reg ^= OSCCTRL_DFLLMUL_CSTEP(mask);
1969 OSCCTRL_CRITICAL_SECTION_LEAVE();
1970 }
1971
hri_oscctrl_read_DFLLMUL_CSTEP_bf(const void * const hw)1972 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_read_DFLLMUL_CSTEP_bf(const void *const hw)
1973 {
1974 uint32_t tmp;
1975 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1976 tmp = (tmp & OSCCTRL_DFLLMUL_CSTEP_Msk) >> OSCCTRL_DFLLMUL_CSTEP_Pos;
1977 return tmp;
1978 }
1979
hri_oscctrl_set_DFLLMUL_reg(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1980 static inline void hri_oscctrl_set_DFLLMUL_reg(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
1981 {
1982 OSCCTRL_CRITICAL_SECTION_ENTER();
1983 ((Oscctrl *)hw)->DFLLMUL.reg |= mask;
1984 OSCCTRL_CRITICAL_SECTION_LEAVE();
1985 }
1986
hri_oscctrl_get_DFLLMUL_reg(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)1987 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_get_DFLLMUL_reg(const void *const hw,
1988 hri_oscctrl_dfllmul_reg_t mask)
1989 {
1990 uint32_t tmp;
1991 tmp = ((Oscctrl *)hw)->DFLLMUL.reg;
1992 tmp &= mask;
1993 return tmp;
1994 }
1995
hri_oscctrl_write_DFLLMUL_reg(const void * const hw,hri_oscctrl_dfllmul_reg_t data)1996 static inline void hri_oscctrl_write_DFLLMUL_reg(const void *const hw, hri_oscctrl_dfllmul_reg_t data)
1997 {
1998 OSCCTRL_CRITICAL_SECTION_ENTER();
1999 ((Oscctrl *)hw)->DFLLMUL.reg = data;
2000 OSCCTRL_CRITICAL_SECTION_LEAVE();
2001 }
2002
hri_oscctrl_clear_DFLLMUL_reg(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)2003 static inline void hri_oscctrl_clear_DFLLMUL_reg(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
2004 {
2005 OSCCTRL_CRITICAL_SECTION_ENTER();
2006 ((Oscctrl *)hw)->DFLLMUL.reg &= ~mask;
2007 OSCCTRL_CRITICAL_SECTION_LEAVE();
2008 }
2009
hri_oscctrl_toggle_DFLLMUL_reg(const void * const hw,hri_oscctrl_dfllmul_reg_t mask)2010 static inline void hri_oscctrl_toggle_DFLLMUL_reg(const void *const hw, hri_oscctrl_dfllmul_reg_t mask)
2011 {
2012 OSCCTRL_CRITICAL_SECTION_ENTER();
2013 ((Oscctrl *)hw)->DFLLMUL.reg ^= mask;
2014 OSCCTRL_CRITICAL_SECTION_LEAVE();
2015 }
2016
hri_oscctrl_read_DFLLMUL_reg(const void * const hw)2017 static inline hri_oscctrl_dfllmul_reg_t hri_oscctrl_read_DFLLMUL_reg(const void *const hw)
2018 {
2019 return ((Oscctrl *)hw)->DFLLMUL.reg;
2020 }
2021
hri_oscctrl_set_DFLLSYNC_READREQ_bit(const void * const hw)2022 static inline void hri_oscctrl_set_DFLLSYNC_READREQ_bit(const void *const hw)
2023 {
2024 OSCCTRL_CRITICAL_SECTION_ENTER();
2025 ((Oscctrl *)hw)->DFLLSYNC.reg |= OSCCTRL_DFLLSYNC_READREQ;
2026 OSCCTRL_CRITICAL_SECTION_LEAVE();
2027 }
2028
hri_oscctrl_get_DFLLSYNC_READREQ_bit(const void * const hw)2029 static inline bool hri_oscctrl_get_DFLLSYNC_READREQ_bit(const void *const hw)
2030 {
2031 uint8_t tmp;
2032 tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
2033 tmp = (tmp & OSCCTRL_DFLLSYNC_READREQ) >> OSCCTRL_DFLLSYNC_READREQ_Pos;
2034 return (bool)tmp;
2035 }
2036
hri_oscctrl_write_DFLLSYNC_READREQ_bit(const void * const hw,bool value)2037 static inline void hri_oscctrl_write_DFLLSYNC_READREQ_bit(const void *const hw, bool value)
2038 {
2039 uint8_t tmp;
2040 OSCCTRL_CRITICAL_SECTION_ENTER();
2041 tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
2042 tmp &= ~OSCCTRL_DFLLSYNC_READREQ;
2043 tmp |= value << OSCCTRL_DFLLSYNC_READREQ_Pos;
2044 ((Oscctrl *)hw)->DFLLSYNC.reg = tmp;
2045 OSCCTRL_CRITICAL_SECTION_LEAVE();
2046 }
2047
hri_oscctrl_clear_DFLLSYNC_READREQ_bit(const void * const hw)2048 static inline void hri_oscctrl_clear_DFLLSYNC_READREQ_bit(const void *const hw)
2049 {
2050 OSCCTRL_CRITICAL_SECTION_ENTER();
2051 ((Oscctrl *)hw)->DFLLSYNC.reg &= ~OSCCTRL_DFLLSYNC_READREQ;
2052 OSCCTRL_CRITICAL_SECTION_LEAVE();
2053 }
2054
hri_oscctrl_toggle_DFLLSYNC_READREQ_bit(const void * const hw)2055 static inline void hri_oscctrl_toggle_DFLLSYNC_READREQ_bit(const void *const hw)
2056 {
2057 OSCCTRL_CRITICAL_SECTION_ENTER();
2058 ((Oscctrl *)hw)->DFLLSYNC.reg ^= OSCCTRL_DFLLSYNC_READREQ;
2059 OSCCTRL_CRITICAL_SECTION_LEAVE();
2060 }
2061
hri_oscctrl_set_DFLLSYNC_reg(const void * const hw,hri_oscctrl_dfllsync_reg_t mask)2062 static inline void hri_oscctrl_set_DFLLSYNC_reg(const void *const hw, hri_oscctrl_dfllsync_reg_t mask)
2063 {
2064 OSCCTRL_CRITICAL_SECTION_ENTER();
2065 ((Oscctrl *)hw)->DFLLSYNC.reg |= mask;
2066 OSCCTRL_CRITICAL_SECTION_LEAVE();
2067 }
2068
hri_oscctrl_get_DFLLSYNC_reg(const void * const hw,hri_oscctrl_dfllsync_reg_t mask)2069 static inline hri_oscctrl_dfllsync_reg_t hri_oscctrl_get_DFLLSYNC_reg(const void *const hw,
2070 hri_oscctrl_dfllsync_reg_t mask)
2071 {
2072 uint8_t tmp;
2073 tmp = ((Oscctrl *)hw)->DFLLSYNC.reg;
2074 tmp &= mask;
2075 return tmp;
2076 }
2077
hri_oscctrl_write_DFLLSYNC_reg(const void * const hw,hri_oscctrl_dfllsync_reg_t data)2078 static inline void hri_oscctrl_write_DFLLSYNC_reg(const void *const hw, hri_oscctrl_dfllsync_reg_t data)
2079 {
2080 OSCCTRL_CRITICAL_SECTION_ENTER();
2081 ((Oscctrl *)hw)->DFLLSYNC.reg = data;
2082 OSCCTRL_CRITICAL_SECTION_LEAVE();
2083 }
2084
hri_oscctrl_clear_DFLLSYNC_reg(const void * const hw,hri_oscctrl_dfllsync_reg_t mask)2085 static inline void hri_oscctrl_clear_DFLLSYNC_reg(const void *const hw, hri_oscctrl_dfllsync_reg_t mask)
2086 {
2087 OSCCTRL_CRITICAL_SECTION_ENTER();
2088 ((Oscctrl *)hw)->DFLLSYNC.reg &= ~mask;
2089 OSCCTRL_CRITICAL_SECTION_LEAVE();
2090 }
2091
hri_oscctrl_toggle_DFLLSYNC_reg(const void * const hw,hri_oscctrl_dfllsync_reg_t mask)2092 static inline void hri_oscctrl_toggle_DFLLSYNC_reg(const void *const hw, hri_oscctrl_dfllsync_reg_t mask)
2093 {
2094 OSCCTRL_CRITICAL_SECTION_ENTER();
2095 ((Oscctrl *)hw)->DFLLSYNC.reg ^= mask;
2096 OSCCTRL_CRITICAL_SECTION_LEAVE();
2097 }
2098
hri_oscctrl_read_DFLLSYNC_reg(const void * const hw)2099 static inline hri_oscctrl_dfllsync_reg_t hri_oscctrl_read_DFLLSYNC_reg(const void *const hw)
2100 {
2101 return ((Oscctrl *)hw)->DFLLSYNC.reg;
2102 }
2103
hri_oscctrl_set_DPLLCTRLA_ENABLE_bit(const void * const hw)2104 static inline void hri_oscctrl_set_DPLLCTRLA_ENABLE_bit(const void *const hw)
2105 {
2106 OSCCTRL_CRITICAL_SECTION_ENTER();
2107 ((Oscctrl *)hw)->DPLLCTRLA.reg |= OSCCTRL_DPLLCTRLA_ENABLE;
2108 OSCCTRL_CRITICAL_SECTION_LEAVE();
2109 }
2110
hri_oscctrl_get_DPLLCTRLA_ENABLE_bit(const void * const hw)2111 static inline bool hri_oscctrl_get_DPLLCTRLA_ENABLE_bit(const void *const hw)
2112 {
2113 uint8_t tmp;
2114 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2115 tmp = (tmp & OSCCTRL_DPLLCTRLA_ENABLE) >> OSCCTRL_DPLLCTRLA_ENABLE_Pos;
2116 return (bool)tmp;
2117 }
2118
hri_oscctrl_write_DPLLCTRLA_ENABLE_bit(const void * const hw,bool value)2119 static inline void hri_oscctrl_write_DPLLCTRLA_ENABLE_bit(const void *const hw, bool value)
2120 {
2121 uint8_t tmp;
2122 OSCCTRL_CRITICAL_SECTION_ENTER();
2123 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2124 tmp &= ~OSCCTRL_DPLLCTRLA_ENABLE;
2125 tmp |= value << OSCCTRL_DPLLCTRLA_ENABLE_Pos;
2126 ((Oscctrl *)hw)->DPLLCTRLA.reg = tmp;
2127 OSCCTRL_CRITICAL_SECTION_LEAVE();
2128 }
2129
hri_oscctrl_clear_DPLLCTRLA_ENABLE_bit(const void * const hw)2130 static inline void hri_oscctrl_clear_DPLLCTRLA_ENABLE_bit(const void *const hw)
2131 {
2132 OSCCTRL_CRITICAL_SECTION_ENTER();
2133 ((Oscctrl *)hw)->DPLLCTRLA.reg &= ~OSCCTRL_DPLLCTRLA_ENABLE;
2134 OSCCTRL_CRITICAL_SECTION_LEAVE();
2135 }
2136
hri_oscctrl_toggle_DPLLCTRLA_ENABLE_bit(const void * const hw)2137 static inline void hri_oscctrl_toggle_DPLLCTRLA_ENABLE_bit(const void *const hw)
2138 {
2139 OSCCTRL_CRITICAL_SECTION_ENTER();
2140 ((Oscctrl *)hw)->DPLLCTRLA.reg ^= OSCCTRL_DPLLCTRLA_ENABLE;
2141 OSCCTRL_CRITICAL_SECTION_LEAVE();
2142 }
2143
hri_oscctrl_set_DPLLCTRLA_RUNSTDBY_bit(const void * const hw)2144 static inline void hri_oscctrl_set_DPLLCTRLA_RUNSTDBY_bit(const void *const hw)
2145 {
2146 OSCCTRL_CRITICAL_SECTION_ENTER();
2147 ((Oscctrl *)hw)->DPLLCTRLA.reg |= OSCCTRL_DPLLCTRLA_RUNSTDBY;
2148 OSCCTRL_CRITICAL_SECTION_LEAVE();
2149 }
2150
hri_oscctrl_get_DPLLCTRLA_RUNSTDBY_bit(const void * const hw)2151 static inline bool hri_oscctrl_get_DPLLCTRLA_RUNSTDBY_bit(const void *const hw)
2152 {
2153 uint8_t tmp;
2154 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2155 tmp = (tmp & OSCCTRL_DPLLCTRLA_RUNSTDBY) >> OSCCTRL_DPLLCTRLA_RUNSTDBY_Pos;
2156 return (bool)tmp;
2157 }
2158
hri_oscctrl_write_DPLLCTRLA_RUNSTDBY_bit(const void * const hw,bool value)2159 static inline void hri_oscctrl_write_DPLLCTRLA_RUNSTDBY_bit(const void *const hw, bool value)
2160 {
2161 uint8_t tmp;
2162 OSCCTRL_CRITICAL_SECTION_ENTER();
2163 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2164 tmp &= ~OSCCTRL_DPLLCTRLA_RUNSTDBY;
2165 tmp |= value << OSCCTRL_DPLLCTRLA_RUNSTDBY_Pos;
2166 ((Oscctrl *)hw)->DPLLCTRLA.reg = tmp;
2167 OSCCTRL_CRITICAL_SECTION_LEAVE();
2168 }
2169
hri_oscctrl_clear_DPLLCTRLA_RUNSTDBY_bit(const void * const hw)2170 static inline void hri_oscctrl_clear_DPLLCTRLA_RUNSTDBY_bit(const void *const hw)
2171 {
2172 OSCCTRL_CRITICAL_SECTION_ENTER();
2173 ((Oscctrl *)hw)->DPLLCTRLA.reg &= ~OSCCTRL_DPLLCTRLA_RUNSTDBY;
2174 OSCCTRL_CRITICAL_SECTION_LEAVE();
2175 }
2176
hri_oscctrl_toggle_DPLLCTRLA_RUNSTDBY_bit(const void * const hw)2177 static inline void hri_oscctrl_toggle_DPLLCTRLA_RUNSTDBY_bit(const void *const hw)
2178 {
2179 OSCCTRL_CRITICAL_SECTION_ENTER();
2180 ((Oscctrl *)hw)->DPLLCTRLA.reg ^= OSCCTRL_DPLLCTRLA_RUNSTDBY;
2181 OSCCTRL_CRITICAL_SECTION_LEAVE();
2182 }
2183
hri_oscctrl_set_DPLLCTRLA_ONDEMAND_bit(const void * const hw)2184 static inline void hri_oscctrl_set_DPLLCTRLA_ONDEMAND_bit(const void *const hw)
2185 {
2186 OSCCTRL_CRITICAL_SECTION_ENTER();
2187 ((Oscctrl *)hw)->DPLLCTRLA.reg |= OSCCTRL_DPLLCTRLA_ONDEMAND;
2188 OSCCTRL_CRITICAL_SECTION_LEAVE();
2189 }
2190
hri_oscctrl_get_DPLLCTRLA_ONDEMAND_bit(const void * const hw)2191 static inline bool hri_oscctrl_get_DPLLCTRLA_ONDEMAND_bit(const void *const hw)
2192 {
2193 uint8_t tmp;
2194 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2195 tmp = (tmp & OSCCTRL_DPLLCTRLA_ONDEMAND) >> OSCCTRL_DPLLCTRLA_ONDEMAND_Pos;
2196 return (bool)tmp;
2197 }
2198
hri_oscctrl_write_DPLLCTRLA_ONDEMAND_bit(const void * const hw,bool value)2199 static inline void hri_oscctrl_write_DPLLCTRLA_ONDEMAND_bit(const void *const hw, bool value)
2200 {
2201 uint8_t tmp;
2202 OSCCTRL_CRITICAL_SECTION_ENTER();
2203 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2204 tmp &= ~OSCCTRL_DPLLCTRLA_ONDEMAND;
2205 tmp |= value << OSCCTRL_DPLLCTRLA_ONDEMAND_Pos;
2206 ((Oscctrl *)hw)->DPLLCTRLA.reg = tmp;
2207 OSCCTRL_CRITICAL_SECTION_LEAVE();
2208 }
2209
hri_oscctrl_clear_DPLLCTRLA_ONDEMAND_bit(const void * const hw)2210 static inline void hri_oscctrl_clear_DPLLCTRLA_ONDEMAND_bit(const void *const hw)
2211 {
2212 OSCCTRL_CRITICAL_SECTION_ENTER();
2213 ((Oscctrl *)hw)->DPLLCTRLA.reg &= ~OSCCTRL_DPLLCTRLA_ONDEMAND;
2214 OSCCTRL_CRITICAL_SECTION_LEAVE();
2215 }
2216
hri_oscctrl_toggle_DPLLCTRLA_ONDEMAND_bit(const void * const hw)2217 static inline void hri_oscctrl_toggle_DPLLCTRLA_ONDEMAND_bit(const void *const hw)
2218 {
2219 OSCCTRL_CRITICAL_SECTION_ENTER();
2220 ((Oscctrl *)hw)->DPLLCTRLA.reg ^= OSCCTRL_DPLLCTRLA_ONDEMAND;
2221 OSCCTRL_CRITICAL_SECTION_LEAVE();
2222 }
2223
hri_oscctrl_set_DPLLCTRLA_reg(const void * const hw,hri_oscctrl_dpllctrla_reg_t mask)2224 static inline void hri_oscctrl_set_DPLLCTRLA_reg(const void *const hw, hri_oscctrl_dpllctrla_reg_t mask)
2225 {
2226 OSCCTRL_CRITICAL_SECTION_ENTER();
2227 ((Oscctrl *)hw)->DPLLCTRLA.reg |= mask;
2228 OSCCTRL_CRITICAL_SECTION_LEAVE();
2229 }
2230
hri_oscctrl_get_DPLLCTRLA_reg(const void * const hw,hri_oscctrl_dpllctrla_reg_t mask)2231 static inline hri_oscctrl_dpllctrla_reg_t hri_oscctrl_get_DPLLCTRLA_reg(const void *const hw,
2232 hri_oscctrl_dpllctrla_reg_t mask)
2233 {
2234 uint8_t tmp;
2235 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg;
2236 tmp &= mask;
2237 return tmp;
2238 }
2239
hri_oscctrl_write_DPLLCTRLA_reg(const void * const hw,hri_oscctrl_dpllctrla_reg_t data)2240 static inline void hri_oscctrl_write_DPLLCTRLA_reg(const void *const hw, hri_oscctrl_dpllctrla_reg_t data)
2241 {
2242 OSCCTRL_CRITICAL_SECTION_ENTER();
2243 ((Oscctrl *)hw)->DPLLCTRLA.reg = data;
2244 OSCCTRL_CRITICAL_SECTION_LEAVE();
2245 }
2246
hri_oscctrl_clear_DPLLCTRLA_reg(const void * const hw,hri_oscctrl_dpllctrla_reg_t mask)2247 static inline void hri_oscctrl_clear_DPLLCTRLA_reg(const void *const hw, hri_oscctrl_dpllctrla_reg_t mask)
2248 {
2249 OSCCTRL_CRITICAL_SECTION_ENTER();
2250 ((Oscctrl *)hw)->DPLLCTRLA.reg &= ~mask;
2251 OSCCTRL_CRITICAL_SECTION_LEAVE();
2252 }
2253
hri_oscctrl_toggle_DPLLCTRLA_reg(const void * const hw,hri_oscctrl_dpllctrla_reg_t mask)2254 static inline void hri_oscctrl_toggle_DPLLCTRLA_reg(const void *const hw, hri_oscctrl_dpllctrla_reg_t mask)
2255 {
2256 OSCCTRL_CRITICAL_SECTION_ENTER();
2257 ((Oscctrl *)hw)->DPLLCTRLA.reg ^= mask;
2258 OSCCTRL_CRITICAL_SECTION_LEAVE();
2259 }
2260
hri_oscctrl_read_DPLLCTRLA_reg(const void * const hw)2261 static inline hri_oscctrl_dpllctrla_reg_t hri_oscctrl_read_DPLLCTRLA_reg(const void *const hw)
2262 {
2263 return ((Oscctrl *)hw)->DPLLCTRLA.reg;
2264 }
2265
hri_oscctrl_set_DPLLRATIO_LDR_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2266 static inline void hri_oscctrl_set_DPLLRATIO_LDR_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2267 {
2268 OSCCTRL_CRITICAL_SECTION_ENTER();
2269 ((Oscctrl *)hw)->DPLLRATIO.reg |= OSCCTRL_DPLLRATIO_LDR(mask);
2270 OSCCTRL_CRITICAL_SECTION_LEAVE();
2271 }
2272
hri_oscctrl_get_DPLLRATIO_LDR_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2273 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_get_DPLLRATIO_LDR_bf(const void *const hw,
2274 hri_oscctrl_dpllratio_reg_t mask)
2275 {
2276 uint32_t tmp;
2277 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2278 tmp = (tmp & OSCCTRL_DPLLRATIO_LDR(mask)) >> OSCCTRL_DPLLRATIO_LDR_Pos;
2279 return tmp;
2280 }
2281
hri_oscctrl_write_DPLLRATIO_LDR_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t data)2282 static inline void hri_oscctrl_write_DPLLRATIO_LDR_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t data)
2283 {
2284 uint32_t tmp;
2285 OSCCTRL_CRITICAL_SECTION_ENTER();
2286 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2287 tmp &= ~OSCCTRL_DPLLRATIO_LDR_Msk;
2288 tmp |= OSCCTRL_DPLLRATIO_LDR(data);
2289 ((Oscctrl *)hw)->DPLLRATIO.reg = tmp;
2290 OSCCTRL_CRITICAL_SECTION_LEAVE();
2291 }
2292
hri_oscctrl_clear_DPLLRATIO_LDR_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2293 static inline void hri_oscctrl_clear_DPLLRATIO_LDR_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2294 {
2295 OSCCTRL_CRITICAL_SECTION_ENTER();
2296 ((Oscctrl *)hw)->DPLLRATIO.reg &= ~OSCCTRL_DPLLRATIO_LDR(mask);
2297 OSCCTRL_CRITICAL_SECTION_LEAVE();
2298 }
2299
hri_oscctrl_toggle_DPLLRATIO_LDR_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2300 static inline void hri_oscctrl_toggle_DPLLRATIO_LDR_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2301 {
2302 OSCCTRL_CRITICAL_SECTION_ENTER();
2303 ((Oscctrl *)hw)->DPLLRATIO.reg ^= OSCCTRL_DPLLRATIO_LDR(mask);
2304 OSCCTRL_CRITICAL_SECTION_LEAVE();
2305 }
2306
hri_oscctrl_read_DPLLRATIO_LDR_bf(const void * const hw)2307 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_read_DPLLRATIO_LDR_bf(const void *const hw)
2308 {
2309 uint32_t tmp;
2310 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2311 tmp = (tmp & OSCCTRL_DPLLRATIO_LDR_Msk) >> OSCCTRL_DPLLRATIO_LDR_Pos;
2312 return tmp;
2313 }
2314
hri_oscctrl_set_DPLLRATIO_LDRFRAC_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2315 static inline void hri_oscctrl_set_DPLLRATIO_LDRFRAC_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2316 {
2317 OSCCTRL_CRITICAL_SECTION_ENTER();
2318 ((Oscctrl *)hw)->DPLLRATIO.reg |= OSCCTRL_DPLLRATIO_LDRFRAC(mask);
2319 OSCCTRL_CRITICAL_SECTION_LEAVE();
2320 }
2321
hri_oscctrl_get_DPLLRATIO_LDRFRAC_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2322 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_get_DPLLRATIO_LDRFRAC_bf(const void *const hw,
2323 hri_oscctrl_dpllratio_reg_t mask)
2324 {
2325 uint32_t tmp;
2326 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2327 tmp = (tmp & OSCCTRL_DPLLRATIO_LDRFRAC(mask)) >> OSCCTRL_DPLLRATIO_LDRFRAC_Pos;
2328 return tmp;
2329 }
2330
hri_oscctrl_write_DPLLRATIO_LDRFRAC_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t data)2331 static inline void hri_oscctrl_write_DPLLRATIO_LDRFRAC_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t data)
2332 {
2333 uint32_t tmp;
2334 OSCCTRL_CRITICAL_SECTION_ENTER();
2335 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2336 tmp &= ~OSCCTRL_DPLLRATIO_LDRFRAC_Msk;
2337 tmp |= OSCCTRL_DPLLRATIO_LDRFRAC(data);
2338 ((Oscctrl *)hw)->DPLLRATIO.reg = tmp;
2339 OSCCTRL_CRITICAL_SECTION_LEAVE();
2340 }
2341
hri_oscctrl_clear_DPLLRATIO_LDRFRAC_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2342 static inline void hri_oscctrl_clear_DPLLRATIO_LDRFRAC_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2343 {
2344 OSCCTRL_CRITICAL_SECTION_ENTER();
2345 ((Oscctrl *)hw)->DPLLRATIO.reg &= ~OSCCTRL_DPLLRATIO_LDRFRAC(mask);
2346 OSCCTRL_CRITICAL_SECTION_LEAVE();
2347 }
2348
hri_oscctrl_toggle_DPLLRATIO_LDRFRAC_bf(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2349 static inline void hri_oscctrl_toggle_DPLLRATIO_LDRFRAC_bf(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2350 {
2351 OSCCTRL_CRITICAL_SECTION_ENTER();
2352 ((Oscctrl *)hw)->DPLLRATIO.reg ^= OSCCTRL_DPLLRATIO_LDRFRAC(mask);
2353 OSCCTRL_CRITICAL_SECTION_LEAVE();
2354 }
2355
hri_oscctrl_read_DPLLRATIO_LDRFRAC_bf(const void * const hw)2356 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_read_DPLLRATIO_LDRFRAC_bf(const void *const hw)
2357 {
2358 uint32_t tmp;
2359 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2360 tmp = (tmp & OSCCTRL_DPLLRATIO_LDRFRAC_Msk) >> OSCCTRL_DPLLRATIO_LDRFRAC_Pos;
2361 return tmp;
2362 }
2363
hri_oscctrl_set_DPLLRATIO_reg(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2364 static inline void hri_oscctrl_set_DPLLRATIO_reg(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2365 {
2366 OSCCTRL_CRITICAL_SECTION_ENTER();
2367 ((Oscctrl *)hw)->DPLLRATIO.reg |= mask;
2368 OSCCTRL_CRITICAL_SECTION_LEAVE();
2369 }
2370
hri_oscctrl_get_DPLLRATIO_reg(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2371 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_get_DPLLRATIO_reg(const void *const hw,
2372 hri_oscctrl_dpllratio_reg_t mask)
2373 {
2374 uint32_t tmp;
2375 tmp = ((Oscctrl *)hw)->DPLLRATIO.reg;
2376 tmp &= mask;
2377 return tmp;
2378 }
2379
hri_oscctrl_write_DPLLRATIO_reg(const void * const hw,hri_oscctrl_dpllratio_reg_t data)2380 static inline void hri_oscctrl_write_DPLLRATIO_reg(const void *const hw, hri_oscctrl_dpllratio_reg_t data)
2381 {
2382 OSCCTRL_CRITICAL_SECTION_ENTER();
2383 ((Oscctrl *)hw)->DPLLRATIO.reg = data;
2384 OSCCTRL_CRITICAL_SECTION_LEAVE();
2385 }
2386
hri_oscctrl_clear_DPLLRATIO_reg(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2387 static inline void hri_oscctrl_clear_DPLLRATIO_reg(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2388 {
2389 OSCCTRL_CRITICAL_SECTION_ENTER();
2390 ((Oscctrl *)hw)->DPLLRATIO.reg &= ~mask;
2391 OSCCTRL_CRITICAL_SECTION_LEAVE();
2392 }
2393
hri_oscctrl_toggle_DPLLRATIO_reg(const void * const hw,hri_oscctrl_dpllratio_reg_t mask)2394 static inline void hri_oscctrl_toggle_DPLLRATIO_reg(const void *const hw, hri_oscctrl_dpllratio_reg_t mask)
2395 {
2396 OSCCTRL_CRITICAL_SECTION_ENTER();
2397 ((Oscctrl *)hw)->DPLLRATIO.reg ^= mask;
2398 OSCCTRL_CRITICAL_SECTION_LEAVE();
2399 }
2400
hri_oscctrl_read_DPLLRATIO_reg(const void * const hw)2401 static inline hri_oscctrl_dpllratio_reg_t hri_oscctrl_read_DPLLRATIO_reg(const void *const hw)
2402 {
2403 return ((Oscctrl *)hw)->DPLLRATIO.reg;
2404 }
2405
hri_oscctrl_set_DPLLCTRLB_LPEN_bit(const void * const hw)2406 static inline void hri_oscctrl_set_DPLLCTRLB_LPEN_bit(const void *const hw)
2407 {
2408 OSCCTRL_CRITICAL_SECTION_ENTER();
2409 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_LPEN;
2410 OSCCTRL_CRITICAL_SECTION_LEAVE();
2411 }
2412
hri_oscctrl_get_DPLLCTRLB_LPEN_bit(const void * const hw)2413 static inline bool hri_oscctrl_get_DPLLCTRLB_LPEN_bit(const void *const hw)
2414 {
2415 uint32_t tmp;
2416 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2417 tmp = (tmp & OSCCTRL_DPLLCTRLB_LPEN) >> OSCCTRL_DPLLCTRLB_LPEN_Pos;
2418 return (bool)tmp;
2419 }
2420
hri_oscctrl_write_DPLLCTRLB_LPEN_bit(const void * const hw,bool value)2421 static inline void hri_oscctrl_write_DPLLCTRLB_LPEN_bit(const void *const hw, bool value)
2422 {
2423 uint32_t tmp;
2424 OSCCTRL_CRITICAL_SECTION_ENTER();
2425 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2426 tmp &= ~OSCCTRL_DPLLCTRLB_LPEN;
2427 tmp |= value << OSCCTRL_DPLLCTRLB_LPEN_Pos;
2428 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2429 OSCCTRL_CRITICAL_SECTION_LEAVE();
2430 }
2431
hri_oscctrl_clear_DPLLCTRLB_LPEN_bit(const void * const hw)2432 static inline void hri_oscctrl_clear_DPLLCTRLB_LPEN_bit(const void *const hw)
2433 {
2434 OSCCTRL_CRITICAL_SECTION_ENTER();
2435 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_LPEN;
2436 OSCCTRL_CRITICAL_SECTION_LEAVE();
2437 }
2438
hri_oscctrl_toggle_DPLLCTRLB_LPEN_bit(const void * const hw)2439 static inline void hri_oscctrl_toggle_DPLLCTRLB_LPEN_bit(const void *const hw)
2440 {
2441 OSCCTRL_CRITICAL_SECTION_ENTER();
2442 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_LPEN;
2443 OSCCTRL_CRITICAL_SECTION_LEAVE();
2444 }
2445
hri_oscctrl_set_DPLLCTRLB_WUF_bit(const void * const hw)2446 static inline void hri_oscctrl_set_DPLLCTRLB_WUF_bit(const void *const hw)
2447 {
2448 OSCCTRL_CRITICAL_SECTION_ENTER();
2449 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_WUF;
2450 OSCCTRL_CRITICAL_SECTION_LEAVE();
2451 }
2452
hri_oscctrl_get_DPLLCTRLB_WUF_bit(const void * const hw)2453 static inline bool hri_oscctrl_get_DPLLCTRLB_WUF_bit(const void *const hw)
2454 {
2455 uint32_t tmp;
2456 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2457 tmp = (tmp & OSCCTRL_DPLLCTRLB_WUF) >> OSCCTRL_DPLLCTRLB_WUF_Pos;
2458 return (bool)tmp;
2459 }
2460
hri_oscctrl_write_DPLLCTRLB_WUF_bit(const void * const hw,bool value)2461 static inline void hri_oscctrl_write_DPLLCTRLB_WUF_bit(const void *const hw, bool value)
2462 {
2463 uint32_t tmp;
2464 OSCCTRL_CRITICAL_SECTION_ENTER();
2465 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2466 tmp &= ~OSCCTRL_DPLLCTRLB_WUF;
2467 tmp |= value << OSCCTRL_DPLLCTRLB_WUF_Pos;
2468 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2469 OSCCTRL_CRITICAL_SECTION_LEAVE();
2470 }
2471
hri_oscctrl_clear_DPLLCTRLB_WUF_bit(const void * const hw)2472 static inline void hri_oscctrl_clear_DPLLCTRLB_WUF_bit(const void *const hw)
2473 {
2474 OSCCTRL_CRITICAL_SECTION_ENTER();
2475 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_WUF;
2476 OSCCTRL_CRITICAL_SECTION_LEAVE();
2477 }
2478
hri_oscctrl_toggle_DPLLCTRLB_WUF_bit(const void * const hw)2479 static inline void hri_oscctrl_toggle_DPLLCTRLB_WUF_bit(const void *const hw)
2480 {
2481 OSCCTRL_CRITICAL_SECTION_ENTER();
2482 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_WUF;
2483 OSCCTRL_CRITICAL_SECTION_LEAVE();
2484 }
2485
hri_oscctrl_set_DPLLCTRLB_LBYPASS_bit(const void * const hw)2486 static inline void hri_oscctrl_set_DPLLCTRLB_LBYPASS_bit(const void *const hw)
2487 {
2488 OSCCTRL_CRITICAL_SECTION_ENTER();
2489 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_LBYPASS;
2490 OSCCTRL_CRITICAL_SECTION_LEAVE();
2491 }
2492
hri_oscctrl_get_DPLLCTRLB_LBYPASS_bit(const void * const hw)2493 static inline bool hri_oscctrl_get_DPLLCTRLB_LBYPASS_bit(const void *const hw)
2494 {
2495 uint32_t tmp;
2496 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2497 tmp = (tmp & OSCCTRL_DPLLCTRLB_LBYPASS) >> OSCCTRL_DPLLCTRLB_LBYPASS_Pos;
2498 return (bool)tmp;
2499 }
2500
hri_oscctrl_write_DPLLCTRLB_LBYPASS_bit(const void * const hw,bool value)2501 static inline void hri_oscctrl_write_DPLLCTRLB_LBYPASS_bit(const void *const hw, bool value)
2502 {
2503 uint32_t tmp;
2504 OSCCTRL_CRITICAL_SECTION_ENTER();
2505 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2506 tmp &= ~OSCCTRL_DPLLCTRLB_LBYPASS;
2507 tmp |= value << OSCCTRL_DPLLCTRLB_LBYPASS_Pos;
2508 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2509 OSCCTRL_CRITICAL_SECTION_LEAVE();
2510 }
2511
hri_oscctrl_clear_DPLLCTRLB_LBYPASS_bit(const void * const hw)2512 static inline void hri_oscctrl_clear_DPLLCTRLB_LBYPASS_bit(const void *const hw)
2513 {
2514 OSCCTRL_CRITICAL_SECTION_ENTER();
2515 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_LBYPASS;
2516 OSCCTRL_CRITICAL_SECTION_LEAVE();
2517 }
2518
hri_oscctrl_toggle_DPLLCTRLB_LBYPASS_bit(const void * const hw)2519 static inline void hri_oscctrl_toggle_DPLLCTRLB_LBYPASS_bit(const void *const hw)
2520 {
2521 OSCCTRL_CRITICAL_SECTION_ENTER();
2522 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_LBYPASS;
2523 OSCCTRL_CRITICAL_SECTION_LEAVE();
2524 }
2525
hri_oscctrl_set_DPLLCTRLB_FILTER_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2526 static inline void hri_oscctrl_set_DPLLCTRLB_FILTER_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2527 {
2528 OSCCTRL_CRITICAL_SECTION_ENTER();
2529 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_FILTER(mask);
2530 OSCCTRL_CRITICAL_SECTION_LEAVE();
2531 }
2532
hri_oscctrl_get_DPLLCTRLB_FILTER_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2533 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_get_DPLLCTRLB_FILTER_bf(const void *const hw,
2534 hri_oscctrl_dpllctrlb_reg_t mask)
2535 {
2536 uint32_t tmp;
2537 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2538 tmp = (tmp & OSCCTRL_DPLLCTRLB_FILTER(mask)) >> OSCCTRL_DPLLCTRLB_FILTER_Pos;
2539 return tmp;
2540 }
2541
hri_oscctrl_write_DPLLCTRLB_FILTER_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t data)2542 static inline void hri_oscctrl_write_DPLLCTRLB_FILTER_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t data)
2543 {
2544 uint32_t tmp;
2545 OSCCTRL_CRITICAL_SECTION_ENTER();
2546 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2547 tmp &= ~OSCCTRL_DPLLCTRLB_FILTER_Msk;
2548 tmp |= OSCCTRL_DPLLCTRLB_FILTER(data);
2549 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2550 OSCCTRL_CRITICAL_SECTION_LEAVE();
2551 }
2552
hri_oscctrl_clear_DPLLCTRLB_FILTER_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2553 static inline void hri_oscctrl_clear_DPLLCTRLB_FILTER_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2554 {
2555 OSCCTRL_CRITICAL_SECTION_ENTER();
2556 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_FILTER(mask);
2557 OSCCTRL_CRITICAL_SECTION_LEAVE();
2558 }
2559
hri_oscctrl_toggle_DPLLCTRLB_FILTER_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2560 static inline void hri_oscctrl_toggle_DPLLCTRLB_FILTER_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2561 {
2562 OSCCTRL_CRITICAL_SECTION_ENTER();
2563 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_FILTER(mask);
2564 OSCCTRL_CRITICAL_SECTION_LEAVE();
2565 }
2566
hri_oscctrl_read_DPLLCTRLB_FILTER_bf(const void * const hw)2567 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_read_DPLLCTRLB_FILTER_bf(const void *const hw)
2568 {
2569 uint32_t tmp;
2570 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2571 tmp = (tmp & OSCCTRL_DPLLCTRLB_FILTER_Msk) >> OSCCTRL_DPLLCTRLB_FILTER_Pos;
2572 return tmp;
2573 }
2574
hri_oscctrl_set_DPLLCTRLB_REFCLK_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2575 static inline void hri_oscctrl_set_DPLLCTRLB_REFCLK_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2576 {
2577 OSCCTRL_CRITICAL_SECTION_ENTER();
2578 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_REFCLK(mask);
2579 OSCCTRL_CRITICAL_SECTION_LEAVE();
2580 }
2581
hri_oscctrl_get_DPLLCTRLB_REFCLK_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2582 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_get_DPLLCTRLB_REFCLK_bf(const void *const hw,
2583 hri_oscctrl_dpllctrlb_reg_t mask)
2584 {
2585 uint32_t tmp;
2586 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2587 tmp = (tmp & OSCCTRL_DPLLCTRLB_REFCLK(mask)) >> OSCCTRL_DPLLCTRLB_REFCLK_Pos;
2588 return tmp;
2589 }
2590
hri_oscctrl_write_DPLLCTRLB_REFCLK_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t data)2591 static inline void hri_oscctrl_write_DPLLCTRLB_REFCLK_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t data)
2592 {
2593 uint32_t tmp;
2594 OSCCTRL_CRITICAL_SECTION_ENTER();
2595 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2596 tmp &= ~OSCCTRL_DPLLCTRLB_REFCLK_Msk;
2597 tmp |= OSCCTRL_DPLLCTRLB_REFCLK(data);
2598 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2599 OSCCTRL_CRITICAL_SECTION_LEAVE();
2600 }
2601
hri_oscctrl_clear_DPLLCTRLB_REFCLK_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2602 static inline void hri_oscctrl_clear_DPLLCTRLB_REFCLK_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2603 {
2604 OSCCTRL_CRITICAL_SECTION_ENTER();
2605 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_REFCLK(mask);
2606 OSCCTRL_CRITICAL_SECTION_LEAVE();
2607 }
2608
hri_oscctrl_toggle_DPLLCTRLB_REFCLK_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2609 static inline void hri_oscctrl_toggle_DPLLCTRLB_REFCLK_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2610 {
2611 OSCCTRL_CRITICAL_SECTION_ENTER();
2612 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_REFCLK(mask);
2613 OSCCTRL_CRITICAL_SECTION_LEAVE();
2614 }
2615
hri_oscctrl_read_DPLLCTRLB_REFCLK_bf(const void * const hw)2616 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_read_DPLLCTRLB_REFCLK_bf(const void *const hw)
2617 {
2618 uint32_t tmp;
2619 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2620 tmp = (tmp & OSCCTRL_DPLLCTRLB_REFCLK_Msk) >> OSCCTRL_DPLLCTRLB_REFCLK_Pos;
2621 return tmp;
2622 }
2623
hri_oscctrl_set_DPLLCTRLB_LTIME_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2624 static inline void hri_oscctrl_set_DPLLCTRLB_LTIME_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2625 {
2626 OSCCTRL_CRITICAL_SECTION_ENTER();
2627 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_LTIME(mask);
2628 OSCCTRL_CRITICAL_SECTION_LEAVE();
2629 }
2630
hri_oscctrl_get_DPLLCTRLB_LTIME_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2631 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_get_DPLLCTRLB_LTIME_bf(const void *const hw,
2632 hri_oscctrl_dpllctrlb_reg_t mask)
2633 {
2634 uint32_t tmp;
2635 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2636 tmp = (tmp & OSCCTRL_DPLLCTRLB_LTIME(mask)) >> OSCCTRL_DPLLCTRLB_LTIME_Pos;
2637 return tmp;
2638 }
2639
hri_oscctrl_write_DPLLCTRLB_LTIME_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t data)2640 static inline void hri_oscctrl_write_DPLLCTRLB_LTIME_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t data)
2641 {
2642 uint32_t tmp;
2643 OSCCTRL_CRITICAL_SECTION_ENTER();
2644 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2645 tmp &= ~OSCCTRL_DPLLCTRLB_LTIME_Msk;
2646 tmp |= OSCCTRL_DPLLCTRLB_LTIME(data);
2647 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2648 OSCCTRL_CRITICAL_SECTION_LEAVE();
2649 }
2650
hri_oscctrl_clear_DPLLCTRLB_LTIME_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2651 static inline void hri_oscctrl_clear_DPLLCTRLB_LTIME_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2652 {
2653 OSCCTRL_CRITICAL_SECTION_ENTER();
2654 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_LTIME(mask);
2655 OSCCTRL_CRITICAL_SECTION_LEAVE();
2656 }
2657
hri_oscctrl_toggle_DPLLCTRLB_LTIME_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2658 static inline void hri_oscctrl_toggle_DPLLCTRLB_LTIME_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2659 {
2660 OSCCTRL_CRITICAL_SECTION_ENTER();
2661 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_LTIME(mask);
2662 OSCCTRL_CRITICAL_SECTION_LEAVE();
2663 }
2664
hri_oscctrl_read_DPLLCTRLB_LTIME_bf(const void * const hw)2665 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_read_DPLLCTRLB_LTIME_bf(const void *const hw)
2666 {
2667 uint32_t tmp;
2668 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2669 tmp = (tmp & OSCCTRL_DPLLCTRLB_LTIME_Msk) >> OSCCTRL_DPLLCTRLB_LTIME_Pos;
2670 return tmp;
2671 }
2672
hri_oscctrl_set_DPLLCTRLB_DIV_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2673 static inline void hri_oscctrl_set_DPLLCTRLB_DIV_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2674 {
2675 OSCCTRL_CRITICAL_SECTION_ENTER();
2676 ((Oscctrl *)hw)->DPLLCTRLB.reg |= OSCCTRL_DPLLCTRLB_DIV(mask);
2677 OSCCTRL_CRITICAL_SECTION_LEAVE();
2678 }
2679
hri_oscctrl_get_DPLLCTRLB_DIV_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2680 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_get_DPLLCTRLB_DIV_bf(const void *const hw,
2681 hri_oscctrl_dpllctrlb_reg_t mask)
2682 {
2683 uint32_t tmp;
2684 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2685 tmp = (tmp & OSCCTRL_DPLLCTRLB_DIV(mask)) >> OSCCTRL_DPLLCTRLB_DIV_Pos;
2686 return tmp;
2687 }
2688
hri_oscctrl_write_DPLLCTRLB_DIV_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t data)2689 static inline void hri_oscctrl_write_DPLLCTRLB_DIV_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t data)
2690 {
2691 uint32_t tmp;
2692 OSCCTRL_CRITICAL_SECTION_ENTER();
2693 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2694 tmp &= ~OSCCTRL_DPLLCTRLB_DIV_Msk;
2695 tmp |= OSCCTRL_DPLLCTRLB_DIV(data);
2696 ((Oscctrl *)hw)->DPLLCTRLB.reg = tmp;
2697 OSCCTRL_CRITICAL_SECTION_LEAVE();
2698 }
2699
hri_oscctrl_clear_DPLLCTRLB_DIV_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2700 static inline void hri_oscctrl_clear_DPLLCTRLB_DIV_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2701 {
2702 OSCCTRL_CRITICAL_SECTION_ENTER();
2703 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~OSCCTRL_DPLLCTRLB_DIV(mask);
2704 OSCCTRL_CRITICAL_SECTION_LEAVE();
2705 }
2706
hri_oscctrl_toggle_DPLLCTRLB_DIV_bf(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2707 static inline void hri_oscctrl_toggle_DPLLCTRLB_DIV_bf(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2708 {
2709 OSCCTRL_CRITICAL_SECTION_ENTER();
2710 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= OSCCTRL_DPLLCTRLB_DIV(mask);
2711 OSCCTRL_CRITICAL_SECTION_LEAVE();
2712 }
2713
hri_oscctrl_read_DPLLCTRLB_DIV_bf(const void * const hw)2714 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_read_DPLLCTRLB_DIV_bf(const void *const hw)
2715 {
2716 uint32_t tmp;
2717 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2718 tmp = (tmp & OSCCTRL_DPLLCTRLB_DIV_Msk) >> OSCCTRL_DPLLCTRLB_DIV_Pos;
2719 return tmp;
2720 }
2721
hri_oscctrl_set_DPLLCTRLB_reg(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2722 static inline void hri_oscctrl_set_DPLLCTRLB_reg(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2723 {
2724 OSCCTRL_CRITICAL_SECTION_ENTER();
2725 ((Oscctrl *)hw)->DPLLCTRLB.reg |= mask;
2726 OSCCTRL_CRITICAL_SECTION_LEAVE();
2727 }
2728
hri_oscctrl_get_DPLLCTRLB_reg(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2729 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_get_DPLLCTRLB_reg(const void *const hw,
2730 hri_oscctrl_dpllctrlb_reg_t mask)
2731 {
2732 uint32_t tmp;
2733 tmp = ((Oscctrl *)hw)->DPLLCTRLB.reg;
2734 tmp &= mask;
2735 return tmp;
2736 }
2737
hri_oscctrl_write_DPLLCTRLB_reg(const void * const hw,hri_oscctrl_dpllctrlb_reg_t data)2738 static inline void hri_oscctrl_write_DPLLCTRLB_reg(const void *const hw, hri_oscctrl_dpllctrlb_reg_t data)
2739 {
2740 OSCCTRL_CRITICAL_SECTION_ENTER();
2741 ((Oscctrl *)hw)->DPLLCTRLB.reg = data;
2742 OSCCTRL_CRITICAL_SECTION_LEAVE();
2743 }
2744
hri_oscctrl_clear_DPLLCTRLB_reg(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2745 static inline void hri_oscctrl_clear_DPLLCTRLB_reg(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2746 {
2747 OSCCTRL_CRITICAL_SECTION_ENTER();
2748 ((Oscctrl *)hw)->DPLLCTRLB.reg &= ~mask;
2749 OSCCTRL_CRITICAL_SECTION_LEAVE();
2750 }
2751
hri_oscctrl_toggle_DPLLCTRLB_reg(const void * const hw,hri_oscctrl_dpllctrlb_reg_t mask)2752 static inline void hri_oscctrl_toggle_DPLLCTRLB_reg(const void *const hw, hri_oscctrl_dpllctrlb_reg_t mask)
2753 {
2754 OSCCTRL_CRITICAL_SECTION_ENTER();
2755 ((Oscctrl *)hw)->DPLLCTRLB.reg ^= mask;
2756 OSCCTRL_CRITICAL_SECTION_LEAVE();
2757 }
2758
hri_oscctrl_read_DPLLCTRLB_reg(const void * const hw)2759 static inline hri_oscctrl_dpllctrlb_reg_t hri_oscctrl_read_DPLLCTRLB_reg(const void *const hw)
2760 {
2761 return ((Oscctrl *)hw)->DPLLCTRLB.reg;
2762 }
2763
hri_oscctrl_set_DPLLPRESC_PRESC_bf(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2764 static inline void hri_oscctrl_set_DPLLPRESC_PRESC_bf(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2765 {
2766 OSCCTRL_CRITICAL_SECTION_ENTER();
2767 ((Oscctrl *)hw)->DPLLPRESC.reg |= OSCCTRL_DPLLPRESC_PRESC(mask);
2768 OSCCTRL_CRITICAL_SECTION_LEAVE();
2769 }
2770
hri_oscctrl_get_DPLLPRESC_PRESC_bf(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2771 static inline hri_oscctrl_dpllpresc_reg_t hri_oscctrl_get_DPLLPRESC_PRESC_bf(const void *const hw,
2772 hri_oscctrl_dpllpresc_reg_t mask)
2773 {
2774 uint8_t tmp;
2775 tmp = ((Oscctrl *)hw)->DPLLPRESC.reg;
2776 tmp = (tmp & OSCCTRL_DPLLPRESC_PRESC(mask)) >> OSCCTRL_DPLLPRESC_PRESC_Pos;
2777 return tmp;
2778 }
2779
hri_oscctrl_write_DPLLPRESC_PRESC_bf(const void * const hw,hri_oscctrl_dpllpresc_reg_t data)2780 static inline void hri_oscctrl_write_DPLLPRESC_PRESC_bf(const void *const hw, hri_oscctrl_dpllpresc_reg_t data)
2781 {
2782 uint8_t tmp;
2783 OSCCTRL_CRITICAL_SECTION_ENTER();
2784 tmp = ((Oscctrl *)hw)->DPLLPRESC.reg;
2785 tmp &= ~OSCCTRL_DPLLPRESC_PRESC_Msk;
2786 tmp |= OSCCTRL_DPLLPRESC_PRESC(data);
2787 ((Oscctrl *)hw)->DPLLPRESC.reg = tmp;
2788 OSCCTRL_CRITICAL_SECTION_LEAVE();
2789 }
2790
hri_oscctrl_clear_DPLLPRESC_PRESC_bf(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2791 static inline void hri_oscctrl_clear_DPLLPRESC_PRESC_bf(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2792 {
2793 OSCCTRL_CRITICAL_SECTION_ENTER();
2794 ((Oscctrl *)hw)->DPLLPRESC.reg &= ~OSCCTRL_DPLLPRESC_PRESC(mask);
2795 OSCCTRL_CRITICAL_SECTION_LEAVE();
2796 }
2797
hri_oscctrl_toggle_DPLLPRESC_PRESC_bf(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2798 static inline void hri_oscctrl_toggle_DPLLPRESC_PRESC_bf(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2799 {
2800 OSCCTRL_CRITICAL_SECTION_ENTER();
2801 ((Oscctrl *)hw)->DPLLPRESC.reg ^= OSCCTRL_DPLLPRESC_PRESC(mask);
2802 OSCCTRL_CRITICAL_SECTION_LEAVE();
2803 }
2804
hri_oscctrl_read_DPLLPRESC_PRESC_bf(const void * const hw)2805 static inline hri_oscctrl_dpllpresc_reg_t hri_oscctrl_read_DPLLPRESC_PRESC_bf(const void *const hw)
2806 {
2807 uint8_t tmp;
2808 tmp = ((Oscctrl *)hw)->DPLLPRESC.reg;
2809 tmp = (tmp & OSCCTRL_DPLLPRESC_PRESC_Msk) >> OSCCTRL_DPLLPRESC_PRESC_Pos;
2810 return tmp;
2811 }
2812
hri_oscctrl_set_DPLLPRESC_reg(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2813 static inline void hri_oscctrl_set_DPLLPRESC_reg(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2814 {
2815 OSCCTRL_CRITICAL_SECTION_ENTER();
2816 ((Oscctrl *)hw)->DPLLPRESC.reg |= mask;
2817 OSCCTRL_CRITICAL_SECTION_LEAVE();
2818 }
2819
hri_oscctrl_get_DPLLPRESC_reg(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2820 static inline hri_oscctrl_dpllpresc_reg_t hri_oscctrl_get_DPLLPRESC_reg(const void *const hw,
2821 hri_oscctrl_dpllpresc_reg_t mask)
2822 {
2823 uint8_t tmp;
2824 tmp = ((Oscctrl *)hw)->DPLLPRESC.reg;
2825 tmp &= mask;
2826 return tmp;
2827 }
2828
hri_oscctrl_write_DPLLPRESC_reg(const void * const hw,hri_oscctrl_dpllpresc_reg_t data)2829 static inline void hri_oscctrl_write_DPLLPRESC_reg(const void *const hw, hri_oscctrl_dpllpresc_reg_t data)
2830 {
2831 OSCCTRL_CRITICAL_SECTION_ENTER();
2832 ((Oscctrl *)hw)->DPLLPRESC.reg = data;
2833 OSCCTRL_CRITICAL_SECTION_LEAVE();
2834 }
2835
hri_oscctrl_clear_DPLLPRESC_reg(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2836 static inline void hri_oscctrl_clear_DPLLPRESC_reg(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2837 {
2838 OSCCTRL_CRITICAL_SECTION_ENTER();
2839 ((Oscctrl *)hw)->DPLLPRESC.reg &= ~mask;
2840 OSCCTRL_CRITICAL_SECTION_LEAVE();
2841 }
2842
hri_oscctrl_toggle_DPLLPRESC_reg(const void * const hw,hri_oscctrl_dpllpresc_reg_t mask)2843 static inline void hri_oscctrl_toggle_DPLLPRESC_reg(const void *const hw, hri_oscctrl_dpllpresc_reg_t mask)
2844 {
2845 OSCCTRL_CRITICAL_SECTION_ENTER();
2846 ((Oscctrl *)hw)->DPLLPRESC.reg ^= mask;
2847 OSCCTRL_CRITICAL_SECTION_LEAVE();
2848 }
2849
hri_oscctrl_read_DPLLPRESC_reg(const void * const hw)2850 static inline hri_oscctrl_dpllpresc_reg_t hri_oscctrl_read_DPLLPRESC_reg(const void *const hw)
2851 {
2852 return ((Oscctrl *)hw)->DPLLPRESC.reg;
2853 }
2854
hri_oscctrl_get_STATUS_XOSCRDY_bit(const void * const hw)2855 static inline bool hri_oscctrl_get_STATUS_XOSCRDY_bit(const void *const hw)
2856 {
2857 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_XOSCRDY) >> OSCCTRL_STATUS_XOSCRDY_Pos;
2858 }
2859
hri_oscctrl_get_STATUS_OSC16MRDY_bit(const void * const hw)2860 static inline bool hri_oscctrl_get_STATUS_OSC16MRDY_bit(const void *const hw)
2861 {
2862 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_OSC16MRDY) >> OSCCTRL_STATUS_OSC16MRDY_Pos;
2863 }
2864
hri_oscctrl_get_STATUS_DFLLRDY_bit(const void * const hw)2865 static inline bool hri_oscctrl_get_STATUS_DFLLRDY_bit(const void *const hw)
2866 {
2867 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLRDY) >> OSCCTRL_STATUS_DFLLRDY_Pos;
2868 }
2869
hri_oscctrl_get_STATUS_DFLLOOB_bit(const void * const hw)2870 static inline bool hri_oscctrl_get_STATUS_DFLLOOB_bit(const void *const hw)
2871 {
2872 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLOOB) >> OSCCTRL_STATUS_DFLLOOB_Pos;
2873 }
2874
hri_oscctrl_get_STATUS_DFLLLCKF_bit(const void * const hw)2875 static inline bool hri_oscctrl_get_STATUS_DFLLLCKF_bit(const void *const hw)
2876 {
2877 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLLCKF) >> OSCCTRL_STATUS_DFLLLCKF_Pos;
2878 }
2879
hri_oscctrl_get_STATUS_DFLLLCKC_bit(const void * const hw)2880 static inline bool hri_oscctrl_get_STATUS_DFLLLCKC_bit(const void *const hw)
2881 {
2882 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLLCKC) >> OSCCTRL_STATUS_DFLLLCKC_Pos;
2883 }
2884
hri_oscctrl_get_STATUS_DFLLRCS_bit(const void * const hw)2885 static inline bool hri_oscctrl_get_STATUS_DFLLRCS_bit(const void *const hw)
2886 {
2887 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DFLLRCS) >> OSCCTRL_STATUS_DFLLRCS_Pos;
2888 }
2889
hri_oscctrl_get_STATUS_DPLLLCKR_bit(const void * const hw)2890 static inline bool hri_oscctrl_get_STATUS_DPLLLCKR_bit(const void *const hw)
2891 {
2892 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DPLLLCKR) >> OSCCTRL_STATUS_DPLLLCKR_Pos;
2893 }
2894
hri_oscctrl_get_STATUS_DPLLLCKF_bit(const void * const hw)2895 static inline bool hri_oscctrl_get_STATUS_DPLLLCKF_bit(const void *const hw)
2896 {
2897 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DPLLLCKF) >> OSCCTRL_STATUS_DPLLLCKF_Pos;
2898 }
2899
hri_oscctrl_get_STATUS_DPLLTO_bit(const void * const hw)2900 static inline bool hri_oscctrl_get_STATUS_DPLLTO_bit(const void *const hw)
2901 {
2902 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DPLLTO) >> OSCCTRL_STATUS_DPLLTO_Pos;
2903 }
2904
hri_oscctrl_get_STATUS_DPLLLDRTO_bit(const void * const hw)2905 static inline bool hri_oscctrl_get_STATUS_DPLLLDRTO_bit(const void *const hw)
2906 {
2907 return (((Oscctrl *)hw)->STATUS.reg & OSCCTRL_STATUS_DPLLLDRTO) >> OSCCTRL_STATUS_DPLLLDRTO_Pos;
2908 }
2909
hri_oscctrl_get_STATUS_reg(const void * const hw,hri_oscctrl_status_reg_t mask)2910 static inline hri_oscctrl_status_reg_t hri_oscctrl_get_STATUS_reg(const void *const hw, hri_oscctrl_status_reg_t mask)
2911 {
2912 uint32_t tmp;
2913 tmp = ((Oscctrl *)hw)->STATUS.reg;
2914 tmp &= mask;
2915 return tmp;
2916 }
2917
hri_oscctrl_read_STATUS_reg(const void * const hw)2918 static inline hri_oscctrl_status_reg_t hri_oscctrl_read_STATUS_reg(const void *const hw)
2919 {
2920 return ((Oscctrl *)hw)->STATUS.reg;
2921 }
2922
hri_oscctrl_get_DPLLSYNCBUSY_ENABLE_bit(const void * const hw)2923 static inline bool hri_oscctrl_get_DPLLSYNCBUSY_ENABLE_bit(const void *const hw)
2924 {
2925 return (((Oscctrl *)hw)->DPLLSYNCBUSY.reg & OSCCTRL_DPLLSYNCBUSY_ENABLE) >> OSCCTRL_DPLLSYNCBUSY_ENABLE_Pos;
2926 }
2927
hri_oscctrl_get_DPLLSYNCBUSY_DPLLRATIO_bit(const void * const hw)2928 static inline bool hri_oscctrl_get_DPLLSYNCBUSY_DPLLRATIO_bit(const void *const hw)
2929 {
2930 return (((Oscctrl *)hw)->DPLLSYNCBUSY.reg & OSCCTRL_DPLLSYNCBUSY_DPLLRATIO) >> OSCCTRL_DPLLSYNCBUSY_DPLLRATIO_Pos;
2931 }
2932
hri_oscctrl_get_DPLLSYNCBUSY_DPLLPRESC_bit(const void * const hw)2933 static inline bool hri_oscctrl_get_DPLLSYNCBUSY_DPLLPRESC_bit(const void *const hw)
2934 {
2935 return (((Oscctrl *)hw)->DPLLSYNCBUSY.reg & OSCCTRL_DPLLSYNCBUSY_DPLLPRESC) >> OSCCTRL_DPLLSYNCBUSY_DPLLPRESC_Pos;
2936 }
2937
hri_oscctrl_get_DPLLSYNCBUSY_reg(const void * const hw,hri_oscctrl_dpllsyncbusy_reg_t mask)2938 static inline hri_oscctrl_dpllsyncbusy_reg_t hri_oscctrl_get_DPLLSYNCBUSY_reg(const void *const hw,
2939 hri_oscctrl_dpllsyncbusy_reg_t mask)
2940 {
2941 uint8_t tmp;
2942 tmp = ((Oscctrl *)hw)->DPLLSYNCBUSY.reg;
2943 tmp &= mask;
2944 return tmp;
2945 }
2946
hri_oscctrl_read_DPLLSYNCBUSY_reg(const void * const hw)2947 static inline hri_oscctrl_dpllsyncbusy_reg_t hri_oscctrl_read_DPLLSYNCBUSY_reg(const void *const hw)
2948 {
2949 return ((Oscctrl *)hw)->DPLLSYNCBUSY.reg;
2950 }
2951
hri_oscctrl_get_DPLLSTATUS_LOCK_bit(const void * const hw)2952 static inline bool hri_oscctrl_get_DPLLSTATUS_LOCK_bit(const void *const hw)
2953 {
2954 return (((Oscctrl *)hw)->DPLLSTATUS.reg & OSCCTRL_DPLLSTATUS_LOCK) >> OSCCTRL_DPLLSTATUS_LOCK_Pos;
2955 }
2956
hri_oscctrl_get_DPLLSTATUS_CLKRDY_bit(const void * const hw)2957 static inline bool hri_oscctrl_get_DPLLSTATUS_CLKRDY_bit(const void *const hw)
2958 {
2959 return (((Oscctrl *)hw)->DPLLSTATUS.reg & OSCCTRL_DPLLSTATUS_CLKRDY) >> OSCCTRL_DPLLSTATUS_CLKRDY_Pos;
2960 }
2961
hri_oscctrl_get_DPLLSTATUS_reg(const void * const hw,hri_oscctrl_dpllstatus_reg_t mask)2962 static inline hri_oscctrl_dpllstatus_reg_t hri_oscctrl_get_DPLLSTATUS_reg(const void *const hw,
2963 hri_oscctrl_dpllstatus_reg_t mask)
2964 {
2965 uint8_t tmp;
2966 tmp = ((Oscctrl *)hw)->DPLLSTATUS.reg;
2967 tmp &= mask;
2968 return tmp;
2969 }
2970
hri_oscctrl_read_DPLLSTATUS_reg(const void * const hw)2971 static inline hri_oscctrl_dpllstatus_reg_t hri_oscctrl_read_DPLLSTATUS_reg(const void *const hw)
2972 {
2973 return ((Oscctrl *)hw)->DPLLSTATUS.reg;
2974 }
2975
2976 #ifdef __cplusplus
2977 }
2978 #endif
2979
2980 #endif /* _HRI_OSCCTRL_L21_H_INCLUDED */
2981 #endif /* _SAML21_OSCCTRL_COMPONENT_ */
2982
