1 /**
2 * \file
3 *
4 * \brief Generic Clock Controller.
5 *
6 * Copyright (C) 2014 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 *
42 */
43
44 #ifndef _HPL_GCLK_H_INCLUDED
45 #define _HPL_GCLK_H_INCLUDED
46
47 #include <compiler.h>
48 #ifdef _UNIT_TEST_
49 #include <hri_gclk1_v210_mock.h>
50 #endif
51
52 #ifdef __cplusplus
53 extern "C" {
54 #endif
55
56 /**
57 * \addtogroup gclk_group GCLK Hardware Proxy Layer
58 *
59 * \section gclk_hpl_rev Revision History
60 * - v0.0.0.1 Initial Commit
61 *
62 *@{
63 */
64
65 /**
66 * \name HPL functions
67 */
68 //@{
69 /**
70 * \brief Enable clock on the given channel with the given clock source
71 *
72 * This function maps the given clock source to the given clock channel
73 * and enables channel.
74 *
75 * \param[in] channel The channel to enable clock for
76 * \param[in] source The clock source for the given channel
77 */
_gclk_enable_channel(const uint8_t channel,const uint8_t source)78 static inline void _gclk_enable_channel(const uint8_t channel, const uint8_t source)
79 {
80
81 hri_gclk_write_PCHCTRL_reg(GCLK, channel, source | GCLK_PCHCTRL_CHEN);
82 }
83
84 //@}
85 /**@}*/
86 #ifdef __cplusplus
87 }
88 #endif
89
90 #endif /* _HPL_GCLK_H_INCLUDED */
91
