1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L0xx_HAL_UART_H 38 #define __STM32L0xx_HAL_UART_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l0xx_hal_def.h" 46 47 /** @addtogroup STM32L0xx_HAL_Driver 48 * @{ 49 */ 50 51 /** @addtogroup UART 52 * @{ 53 */ 54 55 /* Exported types ------------------------------------------------------------*/ 56 /** @defgroup UART_Exported_Types UART Exported Types 57 * @{ 58 */ 59 60 /** 61 * @brief UART Init Structure definition 62 */ 63 typedef struct 64 { 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 66 The baud rate register is computed using the following formula: 67 - If oversampling is 16 or in LIN mode, 68 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) 69 - If oversampling is 8, 70 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4] 71 Baud Rate Register[3] = 0 72 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */ 73 74 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 75 This parameter can be a value of @ref UARTEx_Word_Length. */ 76 77 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 78 This parameter can be a value of @ref UART_Stop_Bits. */ 79 80 uint32_t Parity; /*!< Specifies the parity mode. 81 This parameter can be a value of @ref UART_Parity 82 @note When parity is enabled, the computed parity is inserted 83 at the MSB position of the transmitted data (9th bit when 84 the word length is set to 9 data bits; 8th bit when the 85 word length is set to 8 data bits). */ 86 87 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 88 This parameter can be a value of @ref UART_Mode. */ 89 90 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 91 or disabled. 92 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 93 94 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 95 This parameter can be a value of @ref UART_Over_Sampling. */ 96 97 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 98 Selecting the single sample method increases the receiver tolerance to clock 99 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 100 }UART_InitTypeDef; 101 102 /** 103 * @brief UART Advanced Features initalization structure definition 104 */ 105 typedef struct 106 { 107 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 108 Advanced Features may be initialized at the same time . 109 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 110 111 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 112 This parameter can be a value of @ref UART_Tx_Inv. */ 113 114 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 115 This parameter can be a value of @ref UART_Rx_Inv. */ 116 117 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 118 vs negative/inverted logic). 119 This parameter can be a value of @ref UART_Data_Inv. */ 120 121 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 122 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 123 124 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 125 This parameter can be a value of @ref UART_Overrun_Disable. */ 126 127 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 128 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 129 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 142 143 /** 144 * @brief HAL UART State structures definition 145 * @note HAL UART State value is a combination of 2 different substates: gState and RxState. 146 * - gState contains UART state information related to global Handle management 147 * and also information related to Tx operations. 148 * gState value coding follow below described bitmap : 149 * b7-b6 Error information 150 * 00 : No Error 151 * 01 : (Not Used) 152 * 10 : Timeout 153 * 11 : Error 154 * b5 IP initilisation status 155 * 0 : Reset (IP not initialized) 156 * 1 : Init done (IP not initialized. HAL UART Init function already called) 157 * b4-b3 (not used) 158 * xx : Should be set to 00 159 * b2 Intrinsic process state 160 * 0 : Ready 161 * 1 : Busy (IP busy with some configuration or internal operations) 162 * b1 (not used) 163 * x : Should be set to 0 164 * b0 Tx state 165 * 0 : Ready (no Tx operation ongoing) 166 * 1 : Busy (Tx operation ongoing) 167 * - RxState contains information related to Rx operations. 168 * RxState value coding follow below described bitmap : 169 * b7-b6 (not used) 170 * xx : Should be set to 00 171 * b5 IP initilisation status 172 * 0 : Reset (IP not initialized) 173 * 1 : Init done (IP not initialized) 174 * b4-b2 (not used) 175 * xxx : Should be set to 000 176 * b1 Rx state 177 * 0 : Ready (no Rx operation ongoing) 178 * 1 : Busy (Rx operation ongoing) 179 * b0 (not used) 180 * x : Should be set to 0. 181 */ 182 typedef enum 183 { 184 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized 185 Value is allowed for gState and RxState */ 186 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use 187 Value is allowed for gState and RxState */ 188 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing 189 Value is allowed for gState only */ 190 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing 191 Value is allowed for gState only */ 192 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing 193 Value is allowed for RxState only */ 194 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing 195 Not to be used for neither gState nor RxState. 196 Value is result of combination (Or) between gState and RxState values */ 197 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state 198 Value is allowed for gState only */ 199 HAL_UART_STATE_ERROR = 0xE0U /*!< Error 200 Value is allowed for gState only */ 201 }HAL_UART_StateTypeDef; 202 203 /** 204 * @brief HAL UART Error Code structure definition 205 */ 206 typedef enum 207 { 208 HAL_UART_ERROR_NONE = 0x00, /*!< No error */ 209 HAL_UART_ERROR_PE = 0x01, /*!< Parity error */ 210 HAL_UART_ERROR_NE = 0x02, /*!< Noise error */ 211 HAL_UART_ERROR_FE = 0x04, /*!< frame error */ 212 HAL_UART_ERROR_ORE = 0x08, /*!< Overrun error */ 213 HAL_UART_ERROR_DMA = 0x10, /*!< DMA transfer error */ 214 HAL_UART_ERROR_BUSY = 0x20 /*!< Busy Error */ 215 }HAL_UART_ErrorTypeDef; 216 217 /** 218 * @brief UART clock sources definition 219 */ 220 typedef enum 221 { 222 UART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ 223 UART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ 224 UART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ 225 UART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ 226 UART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ 227 UART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */ 228 }UART_ClockSourceTypeDef; 229 230 /** 231 * @brief UART handle Structure definition 232 */ 233 typedef struct 234 { 235 USART_TypeDef *Instance; /*!< UART registers base address */ 236 237 UART_InitTypeDef Init; /*!< UART communication parameters */ 238 239 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 240 241 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 242 243 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 244 245 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 246 247 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 248 249 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 250 251 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 252 253 uint16_t Mask; /*!< UART Rx RDR register mask */ 254 255 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 256 257 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 258 259 HAL_LockTypeDef Lock; /*!< Locking object */ 260 261 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 262 and also related to Tx operations. 263 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 264 265 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 266 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 267 268 __IO uint32_t ErrorCode; /*!< UART Error code */ 269 270 }UART_HandleTypeDef; 271 272 /** 273 * @} 274 */ 275 276 /* Exported constants --------------------------------------------------------*/ 277 /** @defgroup UART_Exported_Constants UART Exported Constants 278 * @{ 279 */ 280 281 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 282 * @{ 283 */ 284 #define UART_STOPBITS_1 ((uint32_t)0x00000000U) /*!< UART frame with 1 stop bit */ 285 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 286 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 287 /** 288 * @} 289 */ 290 291 /** @defgroup UART_Parity UART Parity 292 * @{ 293 */ 294 #define UART_PARITY_NONE ((uint32_t)0x00000000U) /*!< No parity */ 295 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ 296 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ 297 /** 298 * @} 299 */ 300 301 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 302 * @{ 303 */ 304 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000U) /*!< No hardware control */ 305 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /*!< Request To Send */ 306 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /*!< Clear To Send */ 307 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) /*!< Request and Clear To Send */ 308 /** 309 * @} 310 */ 311 312 /** @defgroup UART_Mode UART Transfer Mode 313 * @{ 314 */ 315 #define UART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ 316 #define UART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ 317 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ 318 /** 319 * @} 320 */ 321 322 /** @defgroup UART_State UART State 323 * @{ 324 */ 325 #define UART_STATE_DISABLE ((uint32_t)0x00000000U) /*!< UART disabled */ 326 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< UART enabled */ 327 /** 328 * @} 329 */ 330 331 /** @defgroup UART_Over_Sampling UART Over Sampling 332 * @{ 333 */ 334 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U) /*!< Oversampling by 16 */ 335 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */ 336 /** 337 * @} 338 */ 339 340 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 341 * @{ 342 */ 343 #define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U) /*!< One-bit sampling disable */ 344 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enable */ 345 /** 346 * @} 347 */ 348 349 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 350 * @{ 351 */ 352 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /*!< Auto Baud rate detection on start bit */ 353 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /*!< Auto Baud rate detection on falling edge */ 354 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /*!< Auto Baud rate detection on 0x7F frame detection */ 355 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /*!< Auto Baud rate detection on 0x55 frame detection */ 356 /** 357 * @} 358 */ 359 360 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut 361 * @{ 362 */ 363 #define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000U) /*!< UART receiver timeout disable */ 364 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< UART receiver timeout enable */ 365 /** 366 * @} 367 */ 368 369 /** @defgroup UART_LIN UART Local Interconnection Network mode 370 * @{ 371 */ 372 #define UART_LIN_DISABLE ((uint32_t)0x00000000U) /*!< Local Interconnect Network disable */ 373 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /*!< Local Interconnect Network enable */ 374 /** 375 * @} 376 */ 377 378 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 379 * @{ 380 */ 381 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U) /*!< LIN 10-bit break detection length */ 382 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /*!< LIN 11-bit break detection length */ 383 /** 384 * @} 385 */ 386 387 /** @defgroup UART_DMA_Tx UART DMA Tx 388 * @{ 389 */ 390 #define UART_DMA_TX_DISABLE ((uint32_t)0x00000000U) /*!< UART DMA TX disabled */ 391 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< UART DMA TX enabled */ 392 /** 393 * @} 394 */ 395 396 /** @defgroup UART_DMA_Rx UART DMA Rx 397 * @{ 398 */ 399 #define UART_DMA_RX_DISABLE ((uint32_t)0x00000000U) /*!< UART DMA RX disabled */ 400 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< UART DMA RX enabled */ 401 /** 402 * @} 403 */ 404 405 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 406 * @{ 407 */ 408 #define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x00000000U) /*!< UART half-duplex disabled */ 409 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /*!< UART half-duplex enabled */ 410 /** 411 * @} 412 */ 413 414 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 415 * @{ 416 */ 417 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U) /*!< UART wake-up on idle line */ 418 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /*!< UART wake-up on address mark */ 419 /** 420 * @} 421 */ 422 423 /** @defgroup UART_Request_Parameters UART Request Parameters 424 * @{ 425 */ 426 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ 427 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */ 428 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */ 429 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ 430 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ 431 /** 432 * @} 433 */ 434 435 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 436 * @{ 437 */ 438 #define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000U) /*!< No advanced feature initialization */ 439 #define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001U) /*!< TX pin active level inversion */ 440 #define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002U) /*!< RX pin active level inversion */ 441 #define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004U) /*!< Binary data inversion */ 442 #define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008U) /*!< TX/RX pins swap */ 443 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010U) /*!< RX overrun disable */ 444 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020U) /*!< DMA disable on Reception Error */ 445 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040U) /*!< Auto Baud rate detection initialization */ 446 #define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080U) /*!< Most significant bit sent/received first */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 452 * @{ 453 */ 454 #define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000U) /*!< TX pin active level inversion disable */ 455 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */ 456 /** 457 * @} 458 */ 459 460 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 461 * @{ 462 */ 463 #define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000U) /*!< RX pin active level inversion disable */ 464 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */ 465 /** 466 * @} 467 */ 468 469 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 470 * @{ 471 */ 472 #define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000U) /*!< Binary data inversion disable */ 473 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */ 474 /** 475 * @} 476 */ 477 478 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 479 * @{ 480 */ 481 #define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000U) /*!< TX/RX pins swap disable */ 482 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */ 483 /** 484 * @} 485 */ 486 487 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 488 * @{ 489 */ 490 #define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000U) /*!< RX overrun enable */ 491 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */ 492 /** 493 * @} 494 */ 495 496 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 497 * @{ 498 */ 499 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000U) /*!< RX Auto Baud rate detection enable */ 500 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /*!< RX Auto Baud rate detection disable */ 501 /** 502 * @} 503 */ 504 505 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 506 * @{ 507 */ 508 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000U) /*!< DMA enable on Reception Error */ 509 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */ 510 /** 511 * @} 512 */ 513 514 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 515 * @{ 516 */ 517 #define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000U) /*!< Most significant bit sent/received first disable */ 518 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */ 519 /** 520 * @} 521 */ 522 523 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 524 * @{ 525 */ 526 #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000U) /*!< UART stop mode disable */ 527 #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /*!< UART stop mode enable */ 528 /** 529 * @} 530 */ 531 532 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 533 * @{ 534 */ 535 #define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000U) /*!< UART mute mode disable */ 536 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /*!< UART mute mode enable */ 537 /** 538 * @} 539 */ 540 541 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 542 * @{ 543 */ 544 #define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24U) /*!< UART address-matching LSB position in CR2 register */ 545 /** 546 * @} 547 */ 548 549 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 550 * @{ 551 */ 552 #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x00000000U) /*!< UART wake-up on address */ 553 #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /*!< UART wake-up on start bit */ 554 #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /*!< UART wake-up on receive data register not empty */ 555 /** 556 * @} 557 */ 558 559 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 560 * @{ 561 */ 562 #define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000U) /*!< Driver enable signal is active high */ 563 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /*!< Driver enable signal is active low */ 564 /** 565 * @} 566 */ 567 568 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 569 * @{ 570 */ 571 #define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21U) /*!< UART Driver Enable assertion time LSB position in CR1 register */ 572 /** 573 * @} 574 */ 575 576 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 577 * @{ 578 */ 579 #define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16U) /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 580 /** 581 * @} 582 */ 583 584 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 585 * @{ 586 */ 587 #define UART_IT_MASK ((uint32_t)0x001FU) /*!< UART interruptions flags mask */ 588 /** 589 * @} 590 */ 591 592 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 593 * @{ 594 */ 595 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF /*!< UART polling-based communications time-out value */ 596 /** 597 * @} 598 */ 599 600 /** @defgroup UART_Flags UART Status Flags 601 * Elements values convention: 0xXXXX 602 * - 0xXXXX : Flag mask in the ISR register 603 * @{ 604 */ 605 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 606 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 607 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 608 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 609 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 610 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 611 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 612 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 613 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 614 #define UART_FLAG_EOBF USART_ISR_EOBF /*!< UART end of block flag */ 615 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 616 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 617 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 618 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 619 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 620 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 621 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 622 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 623 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 624 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 625 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 626 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 627 /** 628 * @} 629 */ 630 631 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 632 * Elements values convention: 000ZZZZZ0XXYYYYYb 633 * - YYYYY : Interrupt source position in the XX register (5bits) 634 * - XX : Interrupt source register (2bits) 635 * - 01: CR1 register 636 * - 10: CR2 register 637 * - 11: CR3 register 638 * - ZZZZZ : Flag position in the ISR register(5bits) 639 * @{ 640 */ 641 #define UART_IT_PE ((uint32_t)0x0028) /*!< UART parity error interruption */ 642 #define UART_IT_TXE ((uint32_t)0x0727) /*!< UART transmit data register empty interruption */ 643 #define UART_IT_TC ((uint32_t)0x0626) /*!< UART transmission complete interruption */ 644 #define UART_IT_RXNE ((uint32_t)0x0525) /*!< UART read data register not empty interruption */ 645 #define UART_IT_IDLE ((uint32_t)0x0424) /*!< UART idle interruption */ 646 #define UART_IT_LBD ((uint32_t)0x0846) /*!< UART LIN break detection interruption */ 647 #define UART_IT_CTS ((uint32_t)0x096A) /*!< UART CTS interruption */ 648 #define UART_IT_CM ((uint32_t)0x112E) /*!< UART character match interruption */ 649 #define UART_IT_WUF ((uint32_t)0x1476) /*!< UART wake-up from stop mode interruption */ 650 651 /** Elements values convention: 000000000XXYYYYYb 652 * - YYYYY : Interrupt source position in the XX register (5bits) 653 * - XX : Interrupt source register (2bits) 654 * - 01: CR1 register 655 * - 10: CR2 register 656 * - 11: CR3 register 657 */ 658 #define UART_IT_ERR ((uint32_t)0x0060) /*!< UART error interruption */ 659 660 /** Elements values convention: 0000ZZZZ00000000b 661 * - ZZZZ : Flag position in the ISR register(4bits) 662 */ 663 #define UART_IT_ORE ((uint32_t)0x0300) /*!< UART overrun error interruption */ 664 #define UART_IT_NE ((uint32_t)0x0200) /*!< UART noise error interruption */ 665 #define UART_IT_FE ((uint32_t)0x0100) /*!< UART frame error interruption */ 666 /** 667 * @} 668 */ 669 670 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 671 * @{ 672 */ 673 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 674 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 675 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ 676 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 677 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 678 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 679 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 680 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 681 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */ 682 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */ 683 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 684 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 685 /** 686 * @} 687 */ 688 689 690 /** 691 * @} 692 */ 693 694 /* Exported macros -----------------------------------------------------------*/ 695 /** @defgroup UART_Exported_Macros UART Exported Macros 696 * @{ 697 */ 698 699 /** @brief Reset UART handle states. 700 * @param __HANDLE__: UART handle. 701 * @retval None 702 */ 703 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 704 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 705 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 706 } while(0) 707 /** @brief Flush the UART Data registers. 708 * @param __HANDLE__: specifies the UART Handle. 709 * @retval None 710 */ 711 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 712 do{ \ 713 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 714 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 715 } while(0) 716 717 /** @brief Clear the specified UART pending flag. 718 * @param __HANDLE__: specifies the UART Handle. 719 * @param __FLAG__: specifies the flag to check. 720 * This parameter can be any combination of the following values: 721 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 722 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 723 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 724 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 725 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 726 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 727 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 728 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 729 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag 730 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag 731 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 732 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 733 * @retval None 734 */ 735 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 736 737 /** @brief Clear the UART PE pending flag. 738 * @param __HANDLE__: specifies the UART Handle. 739 * @retval None 740 */ 741 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 742 743 /** @brief Clear the UART FE pending flag. 744 * @param __HANDLE__: specifies the UART Handle. 745 * @retval None 746 */ 747 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 748 749 /** @brief Clear the UART NE pending flag. 750 * @param __HANDLE__: specifies the UART Handle. 751 * @retval None 752 */ 753 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 754 755 /** @brief Clear the UART ORE pending flag. 756 * @param __HANDLE__: specifies the UART Handle. 757 * @retval None 758 */ 759 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 760 761 /** @brief Clear the UART IDLE pending flag. 762 * @param __HANDLE__: specifies the UART Handle. 763 * @retval None 764 */ 765 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 766 767 /** @brief Check whether the specified UART flag is set or not. 768 * @param __HANDLE__: specifies the UART Handle. 769 * @param __FLAG__: specifies the flag to check. 770 * This parameter can be one of the following values: 771 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 772 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 773 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 774 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 775 * @arg @ref UART_FLAG_SBKF Send Break flag 776 * @arg @ref UART_FLAG_CMF Character match flag 777 * @arg @ref UART_FLAG_BUSY Busy flag 778 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 779 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 780 * @arg @ref UART_FLAG_EOBF End of block flag 781 * @arg @ref UART_FLAG_RTOF Receiver timeout flag 782 * @arg @ref UART_FLAG_CTS CTS Change flag 783 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 784 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 785 * @arg @ref UART_FLAG_TC Transmission Complete flag 786 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 787 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 788 * @arg @ref UART_FLAG_ORE Overrun Error flag 789 * @arg @ref UART_FLAG_NE Noise Error flag 790 * @arg @ref UART_FLAG_FE Framing Error flag 791 * @arg @ref UART_FLAG_PE Parity Error flag 792 * @retval The new state of __FLAG__ (TRUE or FALSE). 793 */ 794 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 795 796 /** @brief Enable the specified UART interrupt. 797 * @param __HANDLE__: specifies the UART Handle. 798 * @param __INTERRUPT__: specifies the UART interrupt source to enable. 799 * This parameter can be one of the following values: 800 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 801 * @arg @ref UART_IT_CM Character match interrupt 802 * @arg @ref UART_IT_CTS CTS change interrupt 803 * @arg @ref UART_IT_LBD LIN Break detection interrupt 804 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 805 * @arg @ref UART_IT_TC Transmission complete interrupt 806 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 807 * @arg @ref UART_IT_IDLE Idle line detection interrupt 808 * @arg @ref UART_IT_PE Parity Error interrupt 809 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 810 * @retval None 811 */ 812 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 813 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 814 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 815 816 817 /** @brief Disable the specified UART interrupt. 818 * @param __HANDLE__: specifies the UART Handle. 819 * @param __INTERRUPT__: specifies the UART interrupt source to disable. 820 * This parameter can be one of the following values: 821 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 822 * @arg @ref UART_IT_CM Character match interrupt 823 * @arg @ref UART_IT_CTS CTS change interrupt 824 * @arg @ref UART_IT_LBD LIN Break detection interrupt 825 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 826 * @arg @ref UART_IT_TC Transmission complete interrupt 827 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 828 * @arg @ref UART_IT_IDLE Idle line detection interrupt 829 * @arg @ref UART_IT_PE Parity Error interrupt 830 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 831 * @retval None 832 */ 833 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 834 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 835 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 836 837 /** @brief Check whether the specified UART interrupt has occurred or not. 838 * @param __HANDLE__: specifies the UART Handle. 839 * @param __IT__: specifies the UART interrupt to check. 840 * This parameter can be one of the following values: 841 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 842 * @arg @ref UART_IT_CM Character match interrupt 843 * @arg @ref UART_IT_CTS CTS change interrupt 844 * @arg @ref UART_IT_LBD LIN Break detection interrupt 845 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 846 * @arg @ref UART_IT_TC Transmission complete interrupt 847 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 848 * @arg @ref UART_IT_IDLE Idle line detection interrupt 849 * @arg @ref UART_IT_ORE Overrun Error interrupt 850 * @arg @ref UART_IT_NE Noise Error interrupt 851 * @arg @ref UART_IT_FE Framing Error interrupt 852 * @arg @ref UART_IT_PE Parity Error interrupt 853 * @retval The new state of __IT__ (TRUE or FALSE). 854 */ 855 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U))) 856 857 /** @brief Check whether the specified UART interrupt source is enabled or not. 858 * @param __HANDLE__: specifies the UART Handle. 859 * @param __IT__: specifies the UART interrupt source to check. 860 * This parameter can be one of the following values: 861 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 862 * @arg @ref UART_IT_CM Character match interrupt 863 * @arg @ref UART_IT_CTS CTS change interrupt 864 * @arg @ref UART_IT_LBD LIN Break detection interrupt 865 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 866 * @arg @ref UART_IT_TC Transmission complete interrupt 867 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 868 * @arg @ref UART_IT_IDLE Idle line detection interrupt 869 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 870 * @arg @ref UART_IT_PE Parity Error interrupt 871 * @retval The new state of __IT__ (TRUE or FALSE). 872 */ 873 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \ 874 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & UART_IT_MASK))) 875 876 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 877 * @param __HANDLE__: specifies the UART Handle. 878 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set 879 * to clear the corresponding interrupt 880 * This parameter can be one of the following values: 881 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 882 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 883 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 884 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 885 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 886 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 887 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 888 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 889 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag 890 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag 891 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 892 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 893 * @retval None 894 */ 895 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 896 897 /** @brief Set a specific UART request flag. 898 * @param __HANDLE__: specifies the UART Handle. 899 * @param __REQ__: specifies the request flag to set 900 * This parameter can be one of the following values: 901 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 902 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 903 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 904 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 905 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 906 * @retval None 907 */ 908 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__)) 909 910 /** @brief Enable the UART one bit sample method. 911 * @param __HANDLE__: specifies the UART Handle. 912 * @retval None 913 */ 914 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 915 916 /** @brief Disable the UART one bit sample method. 917 * @param __HANDLE__: specifies the UART Handle. 918 * @retval None 919 */ 920 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) 921 922 /** @brief Enable UART. 923 * @param __HANDLE__: specifies the UART Handle. 924 * @retval None 925 */ 926 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 927 928 /** @brief Disable UART. 929 * @param __HANDLE__: specifies the UART Handle. 930 * @retval None 931 */ 932 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 933 934 /** @brief Enable CTS flow control. 935 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 936 * without need to call HAL_UART_Init() function. 937 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 938 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 939 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 940 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 941 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 942 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 943 * @param __HANDLE__: specifies the UART Handle. 944 * @retval None 945 */ 946 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 947 do{ \ 948 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 949 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 950 } while(0) 951 952 /** @brief Disable CTS flow control. 953 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 954 * without need to call HAL_UART_Init() function. 955 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 956 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 957 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 958 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 959 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 960 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 961 * @param __HANDLE__: specifies the UART Handle. 962 * @retval None 963 */ 964 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 965 do{ \ 966 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 967 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 968 } while(0) 969 970 /** @brief Enable RTS flow control. 971 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 972 * without need to call HAL_UART_Init() function. 973 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 974 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 975 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 976 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 977 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 978 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 979 * @param __HANDLE__: specifies the UART Handle. 980 * @retval None 981 */ 982 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 983 do{ \ 984 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 985 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 986 } while(0) 987 988 /** @brief Disable RTS flow control. 989 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 990 * without need to call HAL_UART_Init() function. 991 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 992 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 993 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 994 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 995 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 996 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 997 * @param __HANDLE__: specifies the UART Handle. 998 * @retval None 999 */ 1000 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1001 do{ \ 1002 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1003 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1004 } while(0) 1005 1006 /** @brief macros to enable the UART's one bit sampling method 1007 * @param __HANDLE__: specifies the UART Handle. 1008 * @retval None 1009 */ 1010 #define __HAL_UART_ONE_BIT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1011 1012 /** @brief macros to disable the UART's one bit sampling method 1013 * @param __HANDLE__: specifies the UART Handle. 1014 * @retval None 1015 */ 1016 #define __HAL_UART_ONE_BIT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) 1017 1018 1019 /** 1020 * @} 1021 */ 1022 1023 /* Private macros --------------------------------------------------------*/ 1024 /** @defgroup UART_Private_Macros UART Private Macros 1025 * @{ 1026 */ 1027 /** @brief BRR division operation to set BRR register with LPUART. 1028 * @param __PCLK__: LPUART clock. 1029 * @param __BAUD__: Baud rate set by the user. 1030 * @retval Division result 1031 */ 1032 #define UART_DIV_LPUART(__PCLK__, __BAUD__) ((((uint64_t)(__PCLK__)*256U) + ((__BAUD__)/2U)) / (__BAUD__)) 1033 1034 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1035 * @param __PCLK__: UART clock. 1036 * @param __BAUD__: Baud rate set by the user. 1037 * @retval Division result 1038 */ 1039 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1040 1041 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1042 * @param __PCLK__: UART clock. 1043 * @param __BAUD__: Baud rate set by the user. 1044 * @retval Division result 1045 */ 1046 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1047 1048 /** @brief Check whether or not UART instance is Low Power UART. 1049 * @param __HANDLE__: specifies the UART Handle. 1050 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1051 */ 1052 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (((__HANDLE__)->Instance == LPUART1) ? SET : RESET ) 1053 1054 /** @brief Check UART Baud rate. 1055 * @param __BAUDRATE__: Baudrate specified by the user. 1056 * The maximum Baud Rate is derived from the maximum clock on L0 (i.e. 32 MHz) 1057 * divided by the smallest oversampling used on the USART (i.e. 8) 1058 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1059 */ 1060 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001) 1061 1062 /** @brief Check UART byte address 1063 * @param ADDRESS: UART 8-bit address for wake-up process scheme 1064 * @retval Test result (TRUE or FALSE). 1065 */ 1066 #define IS_UART_7B_ADDRESS(ADDRESS) ((ADDRESS) <= 0x7F) 1067 1068 /** @brief Check UART 4-bit address 1069 * @param ADDRESS: UART 4-bit address for wake-up process scheme 1070 * @retval Test result (TRUE or FALSE). 1071 */ 1072 #define IS_UART_4B_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF) 1073 1074 /** @brief Check UART assertion time. 1075 * @param __TIME__: 5-bit value assertion time. 1076 * @retval Test result (TRUE or FALSE). 1077 */ 1078 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F) 1079 1080 /** @brief Check UART deassertion time. 1081 * @param __TIME__: 5-bit value deassertion time. 1082 * @retval Test result (TRUE or FALSE). 1083 */ 1084 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F) 1085 1086 /** 1087 * @brief Ensure that UART frame number of stop bits is valid. 1088 * @param __STOPBITS__: UART frame number of stop bits. 1089 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1090 */ 1091 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1092 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1093 ((__STOPBITS__) == UART_STOPBITS_2)) 1094 1095 /** 1096 * @brief Ensure that LPUART frame number of stop bits is valid. 1097 * @param __STOPBITS__: LPUART frame number of stop bits. 1098 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1099 */ 1100 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1101 ((__STOPBITS__) == UART_STOPBITS_2)) 1102 1103 /** 1104 * @brief Ensure that UART frame parity is valid. 1105 * @param __PARITY__: UART frame parity. 1106 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1107 */ 1108 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1109 ((__PARITY__) == UART_PARITY_EVEN) || \ 1110 ((__PARITY__) == UART_PARITY_ODD)) 1111 1112 /** 1113 * @brief Ensure that UART hardware flow control is valid. 1114 * @param __CONTROL__: UART hardware flow control. 1115 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1116 */ 1117 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1118 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1119 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1120 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1121 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1122 1123 /** 1124 * @brief Ensure that UART communication mode is valid. 1125 * @param __MODE__: UART communication mode. 1126 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1127 */ 1128 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00U) && ((__MODE__) != (uint32_t)0x00U)) 1129 1130 /** 1131 * @brief Ensure that UART state is valid. 1132 * @param __STATE__: UART state. 1133 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1134 */ 1135 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1136 ((__STATE__) == UART_STATE_ENABLE)) 1137 1138 /** 1139 * @brief Ensure that UART oversampling is valid. 1140 * @param __SAMPLING__: UART oversampling. 1141 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1142 */ 1143 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1144 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1145 1146 /** 1147 * @brief Ensure that UART frame sampling is valid. 1148 * @param __ONEBIT__: UART frame sampling. 1149 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1150 */ 1151 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1152 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1153 1154 /** 1155 * @brief Ensure that UART auto Baud rate detection mode is valid. 1156 * @param __MODE__: UART auto Baud rate detection mode. 1157 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1158 */ 1159 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1160 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1161 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1162 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1163 1164 /** 1165 * @brief Ensure that UART receiver timeout setting is valid. 1166 * @param __TIMEOUT__: UART receiver timeout setting. 1167 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1168 */ 1169 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1170 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1171 1172 /** 1173 * @brief Ensure that UART LIN state is valid. 1174 * @param __LIN__: UART LIN state. 1175 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1176 */ 1177 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1178 ((__LIN__) == UART_LIN_ENABLE)) 1179 1180 /** 1181 * @brief Ensure that UART LIN break detection length is valid. 1182 * @param __LENGTH__: UART LIN break detection length. 1183 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1184 */ 1185 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1186 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1187 1188 /** 1189 * @brief Ensure that UART DMA TX state is valid. 1190 * @param __DMATX__: UART DMA TX state. 1191 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1192 */ 1193 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1194 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1195 1196 /** 1197 * @brief Ensure that UART DMA RX state is valid. 1198 * @param __DMARX__: UART DMA RX state. 1199 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1200 */ 1201 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1202 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1203 1204 /** 1205 * @brief Ensure that UART half-duplex state is valid. 1206 * @param __HDSEL__: UART half-duplex state. 1207 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1208 */ 1209 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1210 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1211 1212 /** 1213 * @brief Ensure that UART wake-up method is valid. 1214 * @param __WAKEUP__: UART wake-up method . 1215 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1216 */ 1217 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1218 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1219 1220 /** 1221 * @brief Ensure that UART request parameter is valid. 1222 * @param __PARAM__: UART request parameter. 1223 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1224 */ 1225 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1226 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1227 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1228 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1229 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1230 1231 /** 1232 * @brief Ensure that UART advanced features initialization is valid. 1233 * @param __INIT__: UART advanced features initialization. 1234 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1235 */ 1236 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1237 UART_ADVFEATURE_TXINVERT_INIT | \ 1238 UART_ADVFEATURE_RXINVERT_INIT | \ 1239 UART_ADVFEATURE_DATAINVERT_INIT | \ 1240 UART_ADVFEATURE_SWAP_INIT | \ 1241 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1242 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1243 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1244 UART_ADVFEATURE_MSBFIRST_INIT)) 1245 1246 /** 1247 * @brief Ensure that UART frame TX inversion setting is valid. 1248 * @param __TXINV__: UART frame TX inversion setting. 1249 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1250 */ 1251 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1252 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1253 1254 /** 1255 * @brief Ensure that UART frame RX inversion setting is valid. 1256 * @param __RXINV__: UART frame RX inversion setting. 1257 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1258 */ 1259 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1260 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1261 1262 /** 1263 * @brief Ensure that UART frame data inversion setting is valid. 1264 * @param __DATAINV__: UART frame data inversion setting. 1265 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1266 */ 1267 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1268 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1269 1270 /** 1271 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1272 * @param __SWAP__: UART frame RX/TX pins swap setting. 1273 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1274 */ 1275 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1276 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1277 1278 /** 1279 * @brief Ensure that UART frame overrun setting is valid. 1280 * @param __OVERRUN__: UART frame overrun setting. 1281 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1282 */ 1283 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1284 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1285 1286 /** 1287 * @brief Ensure that UART auto Baud rate state is valid. 1288 * @param __AUTOBAUDRATE__: UART auto Baud rate state. 1289 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1290 */ 1291 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1292 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1293 1294 /** 1295 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1296 * @param __DMA__: UART DMA enabling or disabling on error setting. 1297 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1298 */ 1299 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1300 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1301 1302 /** 1303 * @brief Ensure that UART frame MSB first setting is valid. 1304 * @param __MSBFIRST__: UART frame MSB first setting. 1305 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1306 */ 1307 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1308 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1309 1310 /** 1311 * @brief Ensure that UART stop mode state is valid. 1312 * @param __STOPMODE__: UART stop mode state. 1313 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1314 */ 1315 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1316 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1317 1318 /** 1319 * @brief Ensure that UART mute mode state is valid. 1320 * @param __MUTE__: UART mute mode state. 1321 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1322 */ 1323 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1324 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1325 1326 /** 1327 * @brief Ensure that UART wake-up selection is valid. 1328 * @param __WAKE__: UART wake-up selection. 1329 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1330 */ 1331 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1332 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1333 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1334 1335 /** 1336 * @brief Ensure that UART driver enable polarity is valid. 1337 * @param __POLARITY__: UART driver enable polarity. 1338 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1339 */ 1340 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1341 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1342 1343 /** 1344 * @} 1345 */ 1346 1347 /* Include UART HAL Extended module */ 1348 #include "stm32l0xx_hal_uart_ex.h" 1349 1350 /* Exported functions --------------------------------------------------------*/ 1351 /** @addtogroup UART_Exported_Functions UART Exported Functions 1352 * @{ 1353 */ 1354 1355 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1356 * @{ 1357 */ 1358 1359 /* Initialization and de-initialization functions ****************************/ 1360 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1361 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1362 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1363 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1364 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); 1365 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1366 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1367 1368 /** 1369 * @} 1370 */ 1371 1372 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1373 * @{ 1374 */ 1375 1376 /* IO operation functions *****************************************************/ 1377 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1378 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1379 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1380 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1381 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1382 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1383 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1384 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1385 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1386 /* Transfer Abort functions */ 1387 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1388 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1389 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1390 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1391 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1392 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1393 1394 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1395 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1396 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1397 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1398 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1399 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1400 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); 1401 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); 1402 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); 1403 1404 /** 1405 * @} 1406 */ 1407 1408 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1409 * @{ 1410 */ 1411 1412 /* Peripheral Control functions ************************************************/ 1413 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1414 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1415 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1416 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1417 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1418 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1419 1420 /** 1421 * @} 1422 */ 1423 1424 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1425 * @{ 1426 */ 1427 1428 /* Peripheral State and Errors functions **************************************************/ 1429 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1430 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1431 1432 /** 1433 * @} 1434 */ 1435 1436 /** 1437 * @} 1438 */ 1439 1440 /* Private functions -----------------------------------------------------------*/ 1441 /** @addtogroup UART_Private_Functions UART Private Functions 1442 * @{ 1443 */ 1444 1445 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1446 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1447 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); 1448 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1449 1450 /** 1451 * @} 1452 */ 1453 1454 /** 1455 * @} 1456 */ 1457 1458 /** 1459 * @} 1460 */ 1461 1462 #ifdef __cplusplus 1463 } 1464 #endif 1465 1466 #endif /* __STM32L0xx_HAL_UART_H */ 1467 1468 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1469
