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Searched refs:TIM_CCMR1_CC1S (Results 1 – 20 of 20) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_tim.h451 #define LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << 16U) /*!< ICx is mapped on TRC …
1334 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1367 …MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT… in LL_TIM_OC_SetMode()
1396 …return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT… in LL_TIM_OC_GetMode()
1826 …MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel… in LL_TIM_IC_Config()
1827 …((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx… in LL_TIM_IC_Config()
1854 …MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_… in LL_TIM_IC_SetActiveInput()
1878 …return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChanne… in LL_TIM_IC_GetActiveInput()
Dstm32l1xx_hal_tim.h400 #define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is sele…
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_tim.h454 #define LL_TIM_ACTIVEINPUT_TRC (uint32_t)(TIM_CCMR1_CC1S << 16U) /*!< ICx is mapp…
1359 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
1392 …MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT… in LL_TIM_OC_SetMode()
1421 …return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT… in LL_TIM_OC_GetMode()
1827 …MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel… in LL_TIM_IC_Config()
1828 …((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx… in LL_TIM_IC_Config()
1855 …MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_… in LL_TIM_IC_SetActiveInput()
1879 …return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChanne… in LL_TIM_IC_GetActiveInput()
Dstm32l0xx_hal_tim.h520 #define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is sele…
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_ll_tim.c459 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); in LL_TIM_ENCODER_Init()
533 CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); in OC1Config()
759 (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), in IC1Config()
Dstm32l1xx_hal_tim.c2225 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); in HAL_TIM_Encoder_Init()
2705 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00) in HAL_TIM_IRQHandler()
4512 tmpccmrx &= ~TIM_CCMR1_CC1S; in TIM_OC1_SetConfig()
4843 tmpccmr1 &= ~TIM_CCMR1_CC1S; in TIM_TI1_SetConfig()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_ll_tim.c436 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); in LL_TIM_ENCODER_Init()
511 CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); in OC1Config()
737 (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), in IC1Config()
Dstm32l0xx_hal_tim.c2218 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); in HAL_TIM_Encoder_Init()
2695 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) in HAL_TIM_IRQHandler()
4442 tmpccmrx &= ~TIM_CCMR1_CC1S; in TIM_OC1_SetConfig()
4638 tmpccmr1 &= ~TIM_CCMR1_CC1S; in TIM_TI1_SetConfig()
4643 tmpccmr1 &= ~TIM_CCMR1_CC1S; in TIM_TI1_SetConfig()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_tim.h776 #define LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << 16U) /*!< ICx is mapped on TRC …
2067 CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); in LL_TIM_OC_ConfigOutput()
2112 …MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT… in LL_TIM_OC_SetMode()
2151 …return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT… in LL_TIM_OC_GetMode()
2795 …MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel… in LL_TIM_IC_Config()
2796 …((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx… in LL_TIM_IC_Config()
2823 …MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_… in LL_TIM_IC_SetActiveInput()
2847 …return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChanne… in LL_TIM_IC_GetActiveInput()
Dstm32l4xx_hal_tim.h624 #define TIM_ICSELECTION_TRC TIM_CCMR1_CC1S /*!< TIM Input 1, 2…
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_tim.c556 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); in LL_TIM_ENCODER_Init()
660 tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); in LL_TIM_HALLSENSOR_Init()
825 CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); in OC1Config()
1240 (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), in IC1Config()
Dstm32l4xx_hal_tim.c2609 tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); in HAL_TIM_Encoder_Init()
3113 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) in HAL_TIM_IRQHandler()
5665 tmpccmrx &= ~TIM_CCMR1_CC1S; in TIM_OC1_SetConfig()
6177 tmpccmr1 &= ~TIM_CCMR1_CC1S; in TIM_TI1_SetConfig()
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h5571 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h6092 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h5829 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h5829 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h5933 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h6653 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h6955 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h14233 #define TIM_CCMR1_CC1S TIM_CCMR1_CC1S_Msk /*!<CC1S[1:0] bits (… macro