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Searched refs:TER (Results 1 – 8 of 8) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/
Dcore_cm3.h669 …__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register … member
1595 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_sc300.h649 …__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register … member
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_cm4.h709 …__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register … member
1747 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_cm7.h890 …__IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register … member
2166 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/
Dcore_cm3.h744 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
1701 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_sc300.h726 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
1683 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_cm4.h805 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
1875 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
Dcore_cm7.h1007 __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ member
2450 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()