Searched refs:TCC1 (Results 1 – 12 of 12) sorted by relevance
| /loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/ |
| D | saml21e15b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e16b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e17b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e18b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21g16b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21g17b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21g18b.h | 427 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
558 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j16b.h | 437 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
570 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j17b.h | 437 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
570 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j18b.h | 437 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
570 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j18bu.h | 437 #define TCC1 (0x42001800) /**< \brief (TCC1) APB Base Address */ macro
570 #define TCC1 ((Tcc *)0x42001800UL) /**< \brief (TCC1) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| /loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/ |
| D | tal.h | 667 uint32_t TCC1:1; /*!< bit: 30 TCC1 Interrupt CPU Select */ member
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