1 /** 2 * \file 3 * 4 * \brief Instance description for SUPC 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAML21_SUPC_INSTANCE_ 30 #define _SAML21_SUPC_INSTANCE_ 31 32 /* ========== Register definition for SUPC peripheral ========== */ 33 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 34 #define REG_SUPC_INTENCLR (0x40001400) /**< \brief (SUPC) Interrupt Enable Clear */ 35 #define REG_SUPC_INTENSET (0x40001404) /**< \brief (SUPC) Interrupt Enable Set */ 36 #define REG_SUPC_INTFLAG (0x40001408) /**< \brief (SUPC) Interrupt Flag Status and Clear */ 37 #define REG_SUPC_STATUS (0x4000140C) /**< \brief (SUPC) Power and Clocks Status */ 38 #define REG_SUPC_BOD33 (0x40001410) /**< \brief (SUPC) BOD33 Control */ 39 #define REG_SUPC_BOD12 (0x40001414) /**< \brief (SUPC) BOD12 Control */ 40 #define REG_SUPC_VREG (0x40001418) /**< \brief (SUPC) VREG Control */ 41 #define REG_SUPC_VREF (0x4000141C) /**< \brief (SUPC) VREF Control */ 42 #define REG_SUPC_BBPS (0x40001420) /**< \brief (SUPC) Battery Backup Power Switch */ 43 #define REG_SUPC_BKOUT (0x40001424) /**< \brief (SUPC) Backup Output Control */ 44 #define REG_SUPC_BKIN (0x40001428) /**< \brief (SUPC) Backup Input Control */ 45 #else 46 #define REG_SUPC_INTENCLR (*(RwReg *)0x40001400UL) /**< \brief (SUPC) Interrupt Enable Clear */ 47 #define REG_SUPC_INTENSET (*(RwReg *)0x40001404UL) /**< \brief (SUPC) Interrupt Enable Set */ 48 #define REG_SUPC_INTFLAG (*(RwReg *)0x40001408UL) /**< \brief (SUPC) Interrupt Flag Status and Clear */ 49 #define REG_SUPC_STATUS (*(RoReg *)0x4000140CUL) /**< \brief (SUPC) Power and Clocks Status */ 50 #define REG_SUPC_BOD33 (*(RwReg *)0x40001410UL) /**< \brief (SUPC) BOD33 Control */ 51 #define REG_SUPC_BOD12 (*(RwReg *)0x40001414UL) /**< \brief (SUPC) BOD12 Control */ 52 #define REG_SUPC_VREG (*(RwReg *)0x40001418UL) /**< \brief (SUPC) VREG Control */ 53 #define REG_SUPC_VREF (*(RwReg *)0x4000141CUL) /**< \brief (SUPC) VREF Control */ 54 #define REG_SUPC_BBPS (*(RwReg *)0x40001420UL) /**< \brief (SUPC) Battery Backup Power Switch */ 55 #define REG_SUPC_BKOUT (*(RwReg *)0x40001424UL) /**< \brief (SUPC) Backup Output Control */ 56 #define REG_SUPC_BKIN (*(RoReg *)0x40001428UL) /**< \brief (SUPC) Backup Input Control */ 57 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 58 59 /* ========== Instance parameters for SUPC peripheral ========== */ 60 #define SUPC_BOD12_CALIB_MSB 5 61 #define SUPC_BOD33_CALIB_MSB 5 62 #define SUPC_SUPC_OUT_NUM_MSB 1 // MSB of backup output pad Number 63 64 #endif /* _SAML21_SUPC_INSTANCE_ */ 65
