Home
last modified time | relevance | path

Searched refs:SEQCTRL (Results 1 – 4 of 4) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_ccl_l21.h205 ((Ccl *)hw)->SEQCTRL[index].reg |= CCL_SEQCTRL_SEQSEL(mask); in hri_ccl_set_SEQCTRL_SEQSEL_bf()
213 tmp = ((Ccl *)hw)->SEQCTRL[index].reg; in hri_ccl_get_SEQCTRL_SEQSEL_bf()
222 tmp = ((Ccl *)hw)->SEQCTRL[index].reg; in hri_ccl_write_SEQCTRL_SEQSEL_bf()
225 ((Ccl *)hw)->SEQCTRL[index].reg = tmp; in hri_ccl_write_SEQCTRL_SEQSEL_bf()
232 ((Ccl *)hw)->SEQCTRL[index].reg &= ~CCL_SEQCTRL_SEQSEL(mask); in hri_ccl_clear_SEQCTRL_SEQSEL_bf()
239 ((Ccl *)hw)->SEQCTRL[index].reg ^= CCL_SEQCTRL_SEQSEL(mask); in hri_ccl_toggle_SEQCTRL_SEQSEL_bf()
246 tmp = ((Ccl *)hw)->SEQCTRL[index].reg; in hri_ccl_read_SEQCTRL_SEQSEL_bf()
254 ((Ccl *)hw)->SEQCTRL[index].reg |= mask; in hri_ccl_set_SEQCTRL_reg()
262 tmp = ((Ccl *)hw)->SEQCTRL[index].reg; in hri_ccl_get_SEQCTRL_reg()
270 ((Ccl *)hw)->SEQCTRL[index].reg = data; in hri_ccl_write_SEQCTRL_reg()
[all …]
Dhri_adc_l21.h2308 ((Adc *)hw)->SEQCTRL.reg |= ADC_SEQCTRL_SEQEN(mask); in hri_adc_set_SEQCTRL_SEQEN_bf()
2315 tmp = ((Adc *)hw)->SEQCTRL.reg; in hri_adc_get_SEQCTRL_SEQEN_bf()
2324 tmp = ((Adc *)hw)->SEQCTRL.reg; in hri_adc_write_SEQCTRL_SEQEN_bf()
2327 ((Adc *)hw)->SEQCTRL.reg = tmp; in hri_adc_write_SEQCTRL_SEQEN_bf()
2334 ((Adc *)hw)->SEQCTRL.reg &= ~ADC_SEQCTRL_SEQEN(mask); in hri_adc_clear_SEQCTRL_SEQEN_bf()
2341 ((Adc *)hw)->SEQCTRL.reg ^= ADC_SEQCTRL_SEQEN(mask); in hri_adc_toggle_SEQCTRL_SEQEN_bf()
2348 tmp = ((Adc *)hw)->SEQCTRL.reg; in hri_adc_read_SEQCTRL_SEQEN_bf()
2356 ((Adc *)hw)->SEQCTRL.reg |= mask; in hri_adc_set_SEQCTRL_reg()
2363 tmp = ((Adc *)hw)->SEQCTRL.reg; in hri_adc_get_SEQCTRL_reg()
2371 ((Adc *)hw)->SEQCTRL.reg = data; in hri_adc_write_SEQCTRL_reg()
[all …]
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dccl.h179 __IO CCL_SEQCTRL_Type SEQCTRL[2]; /**< \brief Offset: 0x4 (R/W 8) SEQ Control x */ member
Dadc.h720 __IO ADC_SEQCTRL_Type SEQCTRL; /**< \brief Offset: 0x28 (R/W 32) Sequence Control */ member