Home
last modified time | relevance | path

Searched refs:RCC_CFGR_PPRE1 (Results 1 – 16 of 16) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_rcc.c102 #define RCC_CFGR_PPRE1_BITNUMBER POSITION_VAL(RCC_CFGR_PPRE1)
886 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1098 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITN… in HAL_RCC_GetPCLK1Freq()
1232 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32l1xx_ll_rcc.c115 …CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSE… in LL_RCC_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h68 #define RCC_POSITION_PPRE1 (uint32_t)POSITION_VAL(RCC_CFGR_PPRE1) /*!< field position in re…
997 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
1047 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_rcc.c962 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1238 …return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_BITN… in HAL_RCC_GetPCLK1Freq()
1379 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
Dstm32l0xx_ll_rcc.c151 …CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSE… in LL_RCC_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c1207 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); in HAL_RCC_ClockConfig()
1436 …return (HAL_RCC_GetHCLKFreq() >> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1) >> RCC_CFGR_PP… in HAL_RCC_GetPCLK1Freq()
1633 RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); in HAL_RCC_GetClockConfig()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h1357 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
1407 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_rcc.h2808 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
2858 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1)); in LL_RCC_GetAPB1Prescaler()
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h3548 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h3962 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h3839 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h3839 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h3820 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h4232 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h4302 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h10690 #define RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_Msk /*!< PRE1[2:0] bits … macro