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Searched refs:RCC_CFGR_HPRE (Results 1 – 24 of 24) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_rcc.c101 #define RCC_CFGR_HPRE_BITNUMBER POSITION_VAL(RCC_CFGR_HPRE)
474 … >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_BITNUMBER)]; in HAL_RCC_OscConfig()
778 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
897 …SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFG… in HAL_RCC_ClockConfig()
1229 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
1294 if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1) in RCC_SetFlashLatencyFromMSIRange()
Dstm32l1xx_ll_rcc.c115 …CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSE… in LL_RCC_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c486 …ock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_H… in HAL_RCC_OscConfig()
1098 if(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1) in HAL_RCC_ClockConfig()
1101 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1107 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1151 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); in HAL_RCC_ClockConfig()
1176 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1184 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1); in HAL_RCC_ClockConfig()
1218 …SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >… in HAL_RCC_ClockConfig()
1630 RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_rcc.c505 … >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_BITNUMBER)]; in HAL_RCC_OscConfig()
854 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
973 …SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFG… in HAL_RCC_ClockConfig()
1376 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
1443 if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1) in RCC_SetFlashLatencyFromMSIRange()
Dstm32l0xx_ll_rcc.c151 …CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSE… in LL_RCC_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h67 #define RCC_POSITION_HPRE (uint32_t)POSITION_VAL(RCC_CFGR_HPRE) /*!< field position in re…
449 …PRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_…
981 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); in LL_RCC_SetAHBPrescaler()
1032 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); in LL_RCC_GetAHBPrescaler()
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dsystem_stm32l0xx.c266 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; in SystemCoreClockUpdate()
Dstm32l073xx.h3943 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dsystem_stm32l0xx.c266 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; in SystemCoreClockUpdate()
Dstm32l081xx.h3529 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dsystem_stm32l0xx.c266 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; in SystemCoreClockUpdate()
Dstm32l072xx.h3801 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dsystem_stm32l4xx.c335 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; in SystemCoreClockUpdate()
Dstm32l476xx.h10671 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dsystem_stm32l1xx.c273 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; in SystemCoreClockUpdate()
Dstm32l151xba.h3820 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dsystem_stm32l1xx.c273 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; in SystemCoreClockUpdate()
Dstm32l152xe.h4283 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dsystem_stm32l1xx.c273 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; in SystemCoreClockUpdate()
Dstm32l151xba.h3820 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dsystem_stm32l1xx.c273 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; in SystemCoreClockUpdate()
Dstm32l152xc.h4213 #define RCC_CFGR_HPRE RCC_CFGR_HPRE_Msk /*!< HPRE[3:0] bits … macro
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h643 …PRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_POSIT…
1341 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); in LL_RCC_SetAHBPrescaler()
1392 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); in LL_RCC_GetAHBPrescaler()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_rcc.h1956 …PRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_…
2792 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler); in LL_RCC_SetAHBPrescaler()
2843 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)); in LL_RCC_GetAHBPrescaler()