Home
last modified time | relevance | path

Searched refs:PIN_PA27H_GCLK_IO0 (Results 1 – 11 of 11) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/pio/
Dsaml21e15b.h120 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
122 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21e16b.h120 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
122 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21e17b.h120 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
122 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21e18b.h120 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
122 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21g16b.h157 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
159 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21g17b.h157 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
159 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21g18b.h157 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
159 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21j16b.h197 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
199 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21j17b.h197 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
199 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21j18b.h197 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
199 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)
Dsaml21j18bu.h197 #define PIN_PA27H_GCLK_IO0 _L(27) /**< \brief GCLK signal: IO0 on PA27 mux H */ macro
199 #define PINMUX_PA27H_GCLK_IO0 ((PIN_PA27H_GCLK_IO0 << 16) | MUX_PA27H_GCLK_IO0)