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Searched refs:PCHCTRL (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_gclk_l21.h519 ((Gclk *)hw)->PCHCTRL[index].reg |= GCLK_PCHCTRL_CHEN; in hri_gclk_set_PCHCTRL_CHEN_bit()
526 tmp = ((Gclk *)hw)->PCHCTRL[index].reg; in hri_gclk_get_PCHCTRL_CHEN_bit()
535 tmp = ((Gclk *)hw)->PCHCTRL[index].reg; in hri_gclk_write_PCHCTRL_CHEN_bit()
538 ((Gclk *)hw)->PCHCTRL[index].reg = tmp; in hri_gclk_write_PCHCTRL_CHEN_bit()
545 ((Gclk *)hw)->PCHCTRL[index].reg &= ~GCLK_PCHCTRL_CHEN; in hri_gclk_clear_PCHCTRL_CHEN_bit()
552 ((Gclk *)hw)->PCHCTRL[index].reg ^= GCLK_PCHCTRL_CHEN; in hri_gclk_toggle_PCHCTRL_CHEN_bit()
559 ((Gclk *)hw)->PCHCTRL[index].reg |= GCLK_PCHCTRL_WRTLOCK; in hri_gclk_set_PCHCTRL_WRTLOCK_bit()
566 tmp = ((Gclk *)hw)->PCHCTRL[index].reg; in hri_gclk_get_PCHCTRL_WRTLOCK_bit()
575 tmp = ((Gclk *)hw)->PCHCTRL[index].reg; in hri_gclk_write_PCHCTRL_WRTLOCK_bit()
578 ((Gclk *)hw)->PCHCTRL[index].reg = tmp; in hri_gclk_write_PCHCTRL_WRTLOCK_bit()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dgclk.h242 …__IO GCLK_PCHCTRL_Type PCHCTRL[36]; /**< \brief Offset: 0x80 (R/W 32) Peripheral Clock Con… member