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Searched refs:NVMCTRL (Results 1 – 14 of 14) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/
Dsaml21e15b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21e16b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21e17b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21e18b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21g16b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21g17b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21g18b.h395 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
481 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
492 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21j16b.h403 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
491 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
502 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21j17b.h403 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
491 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
502 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21j18b.h403 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
491 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
502 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
Dsaml21j18bu.h403 #define NVMCTRL (0x41004000) /**< \brief (NVMCTRL) APB Base Address */ macro
491 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */ macro
502 #define NVMCTRL_INSTS { NVMCTRL } /**< \brief (NVMCTRL) Instances List */
/loramac-node-3.4.0/src/boards/mcu/saml21/hpl/core/
Dhpl_init.c56 hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE); in _init_chip()
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/gcc/gcc/
Dstartup_saml21.c237 NVMCTRL->CTRLB.bit.MANW = 1; in Reset_Handler()
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dtal.h649 uint32_t NVMCTRL:1; /*!< bit: 8 NVMCTRL Interrupt CPU Select */ member