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Searched refs:LPDIV (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_mclk_l21.h299 ((Mclk *)hw)->LPDIV.reg |= MCLK_LPDIV_LPDIV(mask); in hri_mclk_set_LPDIV_LPDIV_bf()
306 tmp = ((Mclk *)hw)->LPDIV.reg; in hri_mclk_get_LPDIV_LPDIV_bf()
315 tmp = ((Mclk *)hw)->LPDIV.reg; in hri_mclk_write_LPDIV_LPDIV_bf()
318 ((Mclk *)hw)->LPDIV.reg = tmp; in hri_mclk_write_LPDIV_LPDIV_bf()
325 ((Mclk *)hw)->LPDIV.reg &= ~MCLK_LPDIV_LPDIV(mask); in hri_mclk_clear_LPDIV_LPDIV_bf()
332 ((Mclk *)hw)->LPDIV.reg ^= MCLK_LPDIV_LPDIV(mask); in hri_mclk_toggle_LPDIV_LPDIV_bf()
339 tmp = ((Mclk *)hw)->LPDIV.reg; in hri_mclk_read_LPDIV_LPDIV_bf()
347 ((Mclk *)hw)->LPDIV.reg |= mask; in hri_mclk_set_LPDIV_reg()
354 tmp = ((Mclk *)hw)->LPDIV.reg; in hri_mclk_get_LPDIV_reg()
362 ((Mclk *)hw)->LPDIV.reg = data; in hri_mclk_write_LPDIV_reg()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dmclk.h144 uint8_t LPDIV:8; /*!< bit: 0.. 7 Low-Power Clock Division Factor */ member
476 …__IO MCLK_LPDIV_Type LPDIV; /**< \brief Offset: 0x05 (R/W 8) Low-Power Clock Divi… member