Searched refs:GCLK_PCHCTRL_GEN_GCLK0_Val (Results 1 – 3 of 3) sorted by relevance
28 #define CONF_GCLK_EIC_SRC GCLK_PCHCTRL_GEN_GCLK0_Val84 #define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val108 #define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK0_Val148 #define CONF_GCLK_SERCOM1_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val172 #define CONF_GCLK_SERCOM1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK0_Val212 #define CONF_GCLK_SERCOM4_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val236 #define CONF_GCLK_SERCOM4_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
22 #define CONF_CPU_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
211 #define GCLK_PCHCTRL_GEN_GCLK0_Val _U(0x0) /**< \brief (GCLK_PCHCTRL) Generic clock genera… macro219 #define GCLK_PCHCTRL_GEN_GCLK0 (GCLK_PCHCTRL_GEN_GCLK0_Val << GCLK_PCHCTRL_GEN_Pos)
