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Searched refs:GCLK_PCHCTRL_CHEN (Results 1 – 3 of 3) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hpl/gclk/
Dhpl_gclk_base.h81 hri_gclk_write_PCHCTRL_reg(GCLK, channel, source | GCLK_PCHCTRL_CHEN); in _gclk_enable_channel()
/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_gclk_l21.h519 ((Gclk *)hw)->PCHCTRL[index].reg |= GCLK_PCHCTRL_CHEN; in hri_gclk_set_PCHCTRL_CHEN_bit()
527 tmp = (tmp & GCLK_PCHCTRL_CHEN) >> GCLK_PCHCTRL_CHEN_Pos; in hri_gclk_get_PCHCTRL_CHEN_bit()
536 tmp &= ~GCLK_PCHCTRL_CHEN; in hri_gclk_write_PCHCTRL_CHEN_bit()
545 ((Gclk *)hw)->PCHCTRL[index].reg &= ~GCLK_PCHCTRL_CHEN; in hri_gclk_clear_PCHCTRL_CHEN_bit()
552 ((Gclk *)hw)->PCHCTRL[index].reg ^= GCLK_PCHCTRL_CHEN; in hri_gclk_toggle_PCHCTRL_CHEN_bit()
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dgclk.h228 #define GCLK_PCHCTRL_CHEN (_U(0x1) << GCLK_PCHCTRL_CHEN_Pos) macro