Searched refs:GCLK_GENCTRL_DIVSEL (Results 1 – 2 of 2) sorted by relevance
299 ((Gclk *)hw)->GENCTRL[index].reg |= GCLK_GENCTRL_DIVSEL; in hri_gclk_set_GENCTRL_DIVSEL_bit()307 tmp = (tmp & GCLK_GENCTRL_DIVSEL) >> GCLK_GENCTRL_DIVSEL_Pos; in hri_gclk_get_GENCTRL_DIVSEL_bit()316 tmp &= ~GCLK_GENCTRL_DIVSEL; in hri_gclk_write_GENCTRL_DIVSEL_bit()325 ((Gclk *)hw)->GENCTRL[index].reg &= ~GCLK_GENCTRL_DIVSEL; in hri_gclk_clear_GENCTRL_DIVSEL_bit()332 ((Gclk *)hw)->GENCTRL[index].reg ^= GCLK_GENCTRL_DIVSEL; in hri_gclk_toggle_GENCTRL_DIVSEL_bit()
183 #define GCLK_GENCTRL_DIVSEL (_U(0x1) << GCLK_GENCTRL_DIVSEL_Pos) macro