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Searched refs:DPLLCTRLA (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_oscctrl_l21.h2107 ((Oscctrl *)hw)->DPLLCTRLA.reg |= OSCCTRL_DPLLCTRLA_ENABLE; in hri_oscctrl_set_DPLLCTRLA_ENABLE_bit()
2114 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg; in hri_oscctrl_get_DPLLCTRLA_ENABLE_bit()
2123 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg; in hri_oscctrl_write_DPLLCTRLA_ENABLE_bit()
2126 ((Oscctrl *)hw)->DPLLCTRLA.reg = tmp; in hri_oscctrl_write_DPLLCTRLA_ENABLE_bit()
2133 ((Oscctrl *)hw)->DPLLCTRLA.reg &= ~OSCCTRL_DPLLCTRLA_ENABLE; in hri_oscctrl_clear_DPLLCTRLA_ENABLE_bit()
2140 ((Oscctrl *)hw)->DPLLCTRLA.reg ^= OSCCTRL_DPLLCTRLA_ENABLE; in hri_oscctrl_toggle_DPLLCTRLA_ENABLE_bit()
2147 ((Oscctrl *)hw)->DPLLCTRLA.reg |= OSCCTRL_DPLLCTRLA_RUNSTDBY; in hri_oscctrl_set_DPLLCTRLA_RUNSTDBY_bit()
2154 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg; in hri_oscctrl_get_DPLLCTRLA_RUNSTDBY_bit()
2163 tmp = ((Oscctrl *)hw)->DPLLCTRLA.reg; in hri_oscctrl_write_DPLLCTRLA_RUNSTDBY_bit()
2166 ((Oscctrl *)hw)->DPLLCTRLA.reg = tmp; in hri_oscctrl_write_DPLLCTRLA_RUNSTDBY_bit()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Doscctrl.h620 __IO OSCCTRL_DPLLCTRLA_Type DPLLCTRLA; /**< \brief Offset: 0x28 (R/W 8) DPLL Control */ member