Searched refs:CSELR (Results 1 – 8 of 8) sorted by relevance
190 DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S; in HAL_DMA_Init()193 DMA1_CSELR->CSELR |= hdma->Init.Request; in HAL_DMA_Init()198 DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S; in HAL_DMA_Init()201 DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4U); in HAL_DMA_Init()206 DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S; in HAL_DMA_Init()209 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8U); in HAL_DMA_Init()214 DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S; in HAL_DMA_Init()217 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12U); in HAL_DMA_Init()222 DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S; in HAL_DMA_Init()225 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16U); in HAL_DMA_Init()[all …]
274 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()277 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()282 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()285 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()352 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()357 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
1232 MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_SetPeriphRequest()1274 return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_GetPeriphRequest()
1498 MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_SetPeriphRequest()1532 return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_GetPeriphRequest()
249 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
267 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
266 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
437 __IO uint32_t CSELR; /*!< DMA channel selection register */ member
