Searched refs:CRRCR (Results 1 – 15 of 15) sorted by relevance
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/ |
D | stm32l0xx_ll_rcc.h | 954 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 964 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 974 return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == (RCC_CRRCR_HSI48RDY)); in LL_RCC_HSI48_IsReady() 984 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_POSITION_HSI48CAL); in LL_RCC_HSI48_GetCalibration() 995 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN); in LL_RCC_HSI48_EnableDivider() 1005 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN); in LL_RCC_HSI48_DisableDivider() 1015 return (READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48DIV6OUTEN) == (RCC_CRRCR_HSI48DIV6OUTEN)); in LL_RCC_HSI48_IsDivided()
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D | stm32l0xx_hal_rcc_ex.h | 1905 #define __HAL_RCC_HSI48_ENABLE() do { SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); \ 1912 #define __HAL_RCC_HSI48_DISABLE() do { CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); \ 1922 … (((uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON)) != RESET) ? RCC_HSI48_ON : RCC_HSI48_OFF)
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D | stm32l0xx_hal_rcc.h | 1677 …G_INDEX)? RCC->CR :((((__FLAG__) >> 5) == CSR_REG_INDEX) ? RCC->CSR :RCC->CRRCR)))) & ((uint32_t)1…
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/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/ |
D | system_stm32l0xx.c | 163 RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; in SystemInit()
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D | stm32l073xx.h | 442 …__IO uint32_t CRRCR; /*!< RCC Clock recovery RC register, Ad… member
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/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/ |
D | system_stm32l0xx.c | 163 RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; in SystemInit()
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D | stm32l081xx.h | 411 …__IO uint32_t CRRCR; /*!< RCC Clock recovery RC register, Ad… member
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/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/ |
D | system_stm32l0xx.c | 163 RCC->CRRCR &= (uint32_t)0xFFFFFFFEU; in SystemInit()
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D | stm32l072xx.h | 428 …__IO uint32_t CRRCR; /*!< RCC Clock recovery RC register, Ad… member
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/ |
D | stm32l4xx_hal_rcc.c | 856 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) in HAL_RCC_OscConfig() 873 while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) in HAL_RCC_OscConfig() 1567 if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) in HAL_RCC_GetOscConfig()
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D | stm32l4xx_hal_rcc_ex.c | 1336 if(HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq() 1419 if(HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY)) /* HSI48 ? */ in HAL_RCCEx_GetPeriphCLKFreq()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
D | stm32l0xx_ll_rcc.c | 179 LL_RCC_WriteReg(CRRCR, 0x00000000U); in LL_RCC_DeInit()
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D | stm32l0xx_hal_rcc_ex.c | 501 … else if((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY))) in HAL_RCCEx_GetPeriphCLKFreq()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_ll_rcc.h | 2237 SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Enable() 2247 CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON); in LL_RCC_HSI48_Disable() 2257 return ((READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RCC_CRRCR_HSI48RDY) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady() 2267 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
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D | stm32l4xx_hal_rcc.h | 4068 #define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 4070 #define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) 4466 ((((__FLAG__) >> 5U) == 4U) ? RCC->CRRCR : \
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