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Searched refs:CR (Results 1 – 25 of 182) sorted by relevance

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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_pwr.h219 SET_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_EnableLowPowerRunMode()
229 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_DisableLowPowerRunMode()
239 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN)); in LL_PWR_IsEnabledLowPowerRunMode()
257 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ in LL_PWR_EnterLowPowerRunMode()
258 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ in LL_PWR_EnterLowPowerRunMode()
276 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ in LL_PWR_ExitLowPowerRunMode()
277 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ in LL_PWR_ExitLowPowerRunMode()
290 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling()
303 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); in LL_PWR_GetRegulVoltageScaling()
313 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
[all …]
Dstm32l0xx_hal_firewall.h186 SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \
189 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
208 CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \
211 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
227 SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \
230 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
247 CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \
250 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
269 SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \
272 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
[all …]
Dstm32l0xx_ll_crs.h254 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
264 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
274 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
284 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
294 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
304 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
317 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
327 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
484 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); in LL_CRS_ConfigSynchronization()
505 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in LL_CRS_GenerateEvent_SWSYNC()
[all …]
Dstm32l0xx_ll_dac.h552 MODIFY_REG(DACx->CR, in LL_DAC_SetTriggerSource()
584 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetTriggerSource()
609 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveAutoGeneration()
633 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveAutoGeneration()
672 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveNoiseLFSR()
705 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveNoiseLFSR()
744 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveTriangleAmplitude()
777 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveTriangleAmplitude()
800 MODIFY_REG(DACx->CR, in LL_DAC_SetOutputBuffer()
822 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetOutputBuffer()
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_pwr.h219 SET_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_EnableLowPowerRunMode()
229 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); in LL_PWR_DisableLowPowerRunMode()
239 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN)); in LL_PWR_IsEnabledLowPowerRunMode()
257 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ in LL_PWR_EnterLowPowerRunMode()
258 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ in LL_PWR_EnterLowPowerRunMode()
276 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ in LL_PWR_ExitLowPowerRunMode()
277 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ in LL_PWR_ExitLowPowerRunMode()
290 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); in LL_PWR_SetRegulVoltageScaling()
303 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); in LL_PWR_GetRegulVoltageScaling()
313 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
[all …]
Dstm32l1xx_ll_dac.h514 MODIFY_REG(DACx->CR, in LL_DAC_SetTriggerSource()
542 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetTriggerSource()
564 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveAutoGeneration()
585 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveAutoGeneration()
621 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveNoiseLFSR()
651 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveNoiseLFSR()
687 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveTriangleAmplitude()
717 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveTriangleAmplitude()
737 MODIFY_REG(DACx->CR, in LL_DAC_SetOutputBuffer()
756 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetOutputBuffer()
[all …]
Dstm32l1xx_ll_rtc.h816 MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat); in LL_RTC_SetHourFormat()
829 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT)); in LL_RTC_GetHourFormat()
846 MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput); in LL_RTC_SetAlarmOutEvent()
861 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL)); in LL_RTC_GetAlarmOutEvent()
932 MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity); in LL_RTC_SetOutputPolarity()
945 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL)); in LL_RTC_GetOutputPolarity()
958 SET_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_EnableShadowRegBypass()
969 CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_DisableShadowRegBypass()
980 return (READ_BIT(RTCx->CR, RTC_CR_BYPSHAD) == (RTC_CR_BYPSHAD)); in LL_RTC_IsShadowRegBypassEnabled()
994 SET_BIT(RTCx->CR, RTC_CR_REFCKON); in LL_RTC_EnableRefClock()
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_firewall.h184 SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \
187 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
206 CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \
209 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
225 SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \
228 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
245 CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \
248 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
267 SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \
270 tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
[all …]
Dstm32l4xx_ll_crs.h244 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
254 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
264 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
274 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
284 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
294 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
307 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
317 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
474 MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue); in LL_CRS_ConfigSynchronization()
495 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in LL_CRS_GenerateEvent_SWSYNC()
[all …]
Dstm32l4xx_ll_rng.h180 SET_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Enable()
191 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); in LL_RNG_Disable()
202 return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)); in LL_RNG_IsEnabled()
214 CLEAR_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_EnableClkErrorDetect()
225 SET_BIT(RNGx->CR, RNG_CR_CED); in LL_RNG_DisableClkErrorDetect()
236 return (!(READ_BIT(RNGx->CR, RNG_CR_CED) == (RNG_CR_CED))); in LL_RNG_IsEnabledClkErrorDetect()
343 SET_BIT(RNGx->CR, RNG_CR_IE); in LL_RNG_EnableIT()
355 CLEAR_BIT(RNGx->CR, RNG_CR_IE); in LL_RNG_DisableIT()
367 return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)); in LL_RNG_IsEnabledIT()
Dstm32l4xx_ll_dac.h615 MODIFY_REG(DACx->CR, DAC_CR_HFSEL, HighFreqMode); in LL_DAC_SetHighFrequencyMode()
628 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_HFSEL)); in LL_DAC_GetHighFrequencyMode()
656 MODIFY_REG(DACx->CR, in LL_DAC_SetMode()
676 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_CEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetMode()
752 MODIFY_REG(DACx->CR, in LL_DAC_SetTriggerSource()
789 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetTriggerSource()
814 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveAutoGeneration()
838 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveAutoGeneration()
877 MODIFY_REG(DACx->CR, in LL_DAC_SetWaveNoiseLFSR()
910 return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)) in LL_DAC_GetWaveNoiseLFSR()
[all …]
Dstm32l4xx_ll_rtc.h908 MODIFY_REG(RTCx->CR, RTC_CR_FMT, HourFormat); in LL_RTC_SetHourFormat()
921 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_FMT)); in LL_RTC_GetHourFormat()
938 MODIFY_REG(RTCx->CR, RTC_CR_OSEL, AlarmOutput); in LL_RTC_SetAlarmOutEvent()
953 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_OSEL)); in LL_RTC_GetAlarmOutEvent()
968 MODIFY_REG(RTCx->CR, RTC_CR_TAMPALRM_TYPE, Output); in LL_RTC_SetAlarmOutputType()
981 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_TAMPALRM_TYPE)); in LL_RTC_GetAlarmOutputType()
1082 MODIFY_REG(RTCx->CR, RTC_CR_POL, Polarity); in LL_RTC_SetOutputPolarity()
1095 return (uint32_t)(READ_BIT(RTCx->CR, RTC_CR_POL)); in LL_RTC_GetOutputPolarity()
1107 SET_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_EnableShadowRegBypass()
1118 CLEAR_BIT(RTCx->CR, RTC_CR_BYPSHAD); in LL_RTC_DisableShadowRegBypass()
[all …]
Dstm32l4xx_ll_dma2d.h528 SET_BIT(DMA2Dx->CR, DMA2D_CR_START); in LL_DMA2D_Start()
539 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)); in LL_DMA2D_IsTransferOngoing()
551 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); in LL_DMA2D_Suspend()
563 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); in LL_DMA2D_Resume()
576 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)); in LL_DMA2D_IsSuspended()
588 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); in LL_DMA2D_Abort()
601 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)); in LL_DMA2D_IsAborted()
621 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); in LL_DMA2D_SetMode()
640 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); in LL_DMA2D_GetMode()
772 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode); in LL_DMA2D_SetLineOffsetMode()
[all …]
Dstm32l4xx_ll_swpmi.h276 MODIFY_REG(SWPMIx->CR, SWPMI_CR_RXMODE, RxBufferingMode); in LL_SWPMI_SetReceptionMode()
289 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_RXMODE)); in LL_SWPMI_GetReceptionMode()
304 MODIFY_REG(SWPMIx->CR, SWPMI_CR_TXMODE, TxBufferingMode); in LL_SWPMI_SetTransmissionMode()
317 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_TXMODE)); in LL_SWPMI_GetTransmissionMode()
328 SET_BIT(SWPMIx->CR, SWPMI_CR_LPBK); in LL_SWPMI_EnableLoopback()
339 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_LPBK); in LL_SWPMI_DisableLoopback()
355 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_DEACT); in LL_SWPMI_Activate()
358 SET_BIT(SWPMIx->CR, SWPMI_CR_SWPACT); in LL_SWPMI_Activate()
369 return ((READ_BIT(SWPMIx->CR, SWPMI_CR_SWPACT) == (SWPMI_CR_SWPACT)) ? 1UL : 0UL); in LL_SWPMI_IsActivated()
381 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPACT); in LL_SWPMI_Deactivate()
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_pwr_ex.c88 return (PWR->CR & PWR_CR_VOS); in HAL_PWREx_GetVoltageRange()
102 SET_BIT(PWR->CR, PWR_CR_FWU); in HAL_PWREx_EnableFastWakeUp()
112 CLEAR_BIT(PWR->CR, PWR_CR_FWU); in HAL_PWREx_DisableFastWakeUp()
122 SET_BIT(PWR->CR, PWR_CR_ULP); in HAL_PWREx_EnableUltraLowPower()
132 CLEAR_BIT(PWR->CR, PWR_CR_ULP); in HAL_PWREx_DisableUltraLowPower()
150 SET_BIT(PWR->CR, PWR_CR_LPSDSR); in HAL_PWREx_EnableLowPowerRunMode()
151 SET_BIT(PWR->CR, PWR_CR_LPRUN); in HAL_PWREx_EnableLowPowerRunMode()
167 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); in HAL_PWREx_DisableLowPowerRunMode()
168 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); in HAL_PWREx_DisableLowPowerRunMode()
Dstm32l0xx_hal_pwr.c343 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_EnableBkUpAccess()
356 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_DisableBkUpAccess()
375 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); in HAL_PWR_ConfigPVD()
414 SET_BIT(PWR->CR, PWR_CR_PVDE); in HAL_PWR_EnablePVD()
424 CLEAR_BIT(PWR->CR, PWR_CR_PVDE); in HAL_PWR_DisablePVD()
484 tmpreg = PWR->CR; in HAL_PWR_EnterSLEEPMode()
493 PWR->CR = tmpreg; in HAL_PWR_EnterSLEEPMode()
546 tmpreg = PWR->CR; in HAL_PWR_EnterSTOPMode()
555 PWR->CR = tmpreg; in HAL_PWR_EnterSTOPMode()
595 SET_BIT(PWR->CR, PWR_CR_PDDS); in HAL_PWR_EnterSTANDBYMode()
Dstm32l0xx_hal.c405 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_EnableDBGSleepMode()
414 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_DisableDBGSleepMode()
423 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_EnableDBGStopMode()
432 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_DisableDBGStopMode()
441 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_EnableDBGStandbyMode()
450 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_DisableDBGStandbyMode()
467 DBGMCU->CR |= Periph; in HAL_DBGMCU_DBG_EnableLowPowerConfig()
484 DBGMCU->CR &= ~Periph; in HAL_DBGMCU_DBG_DisableLowPowerConfig()
Dstm32l0xx_hal_rcc_ex.c159 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
162 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
167 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
177 temp_reg = (RCC->CR & RCC_CR_RTCPRE); in HAL_RCCEx_PeriphCLKConfig()
184 …CClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) && HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_PeriphCLKConfig()
349 PeriphClkInit->RTCClockSelection = srcclk | (READ_BIT(RCC->CR, RCC_CR_RTCPRE)); in HAL_RCCEx_GetPeriphCLKConfig()
430 else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIVX) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) in HAL_RCCEx_GetPeriphCLKFreq()
472 if((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) in HAL_RCCEx_GetPeriphCLKFreq()
483 if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U) in HAL_RCCEx_GetPeriphCLKFreq()
524 else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) in HAL_RCCEx_GetPeriphCLKFreq()
[all …]
Dstm32l0xx_hal_dac_ex.c159 …MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitu… in HAL_DACEx_TriangleWaveGenerate()
209 …MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitu… in HAL_DACEx_NoiseWaveGenerate()
359 tmp1 = hdac->Instance->CR & DAC_CR_TEN1; in HAL_DAC_Start()
360 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; in HAL_DAC_Start()
370 tmp1 = hdac->Instance->CR & DAC_CR_TEN2; in HAL_DAC_Start()
371 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2; in HAL_DAC_Start()
433 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); in HAL_DAC_Start_DMA()
467 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); in HAL_DAC_Start_DMA()
535 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_DMAEN1 << Channel)); in HAL_DAC_Stop_DMA()
614 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); in HAL_DAC_IRQHandler()
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c285 SET_BIT(RCC->CR, RCC_CR_MSION); in HAL_RCC_DeInit()
292 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_DeInit()
301 MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); in HAL_RCC_DeInit()
331 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
335 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
339 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON); in HAL_RCC_DeInit()
349 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
353 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
357 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) in HAL_RCC_DeInit()
388 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); in HAL_RCC_DeInit()
[all …]
Dstm32l4xx_hal_rcc_ex.c758 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCCEx_PeriphCLKConfig()
1202 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1221 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1232 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1242 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1294 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1301 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1315 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1355 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1386 if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) in HAL_RCCEx_GetPeriphCLKFreq()
[all …]
Dstm32l4xx_hal_flash.c249 CLEAR_BIT(FLASH->CR, prog_bit); in HAL_FLASH_Program()
340 CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_MER1 | FLASH_CR_PER | FLASH_CR_PNB)); in HAL_FLASH_IRQHandler()
344 CLEAR_BIT(FLASH->CR, FLASH_CR_MER2); in HAL_FLASH_IRQHandler()
350 CLEAR_BIT(FLASH->CR, FLASH_CR_FSTPG); in HAL_FLASH_IRQHandler()
531 if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != 0U) in HAL_FLASH_Unlock()
538 if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != 0U) in HAL_FLASH_Unlock()
554 SET_BIT(FLASH->CR, FLASH_CR_LOCK); in HAL_FLASH_Lock()
565 if(READ_BIT(FLASH->CR, FLASH_CR_OPTLOCK) != 0U) in HAL_FLASH_OB_Unlock()
586 SET_BIT(FLASH->CR, FLASH_CR_OPTLOCK); in HAL_FLASH_OB_Lock()
598 SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); in HAL_FLASH_OB_Launch()
[all …]
Dstm32l4xx_hal_swpmi.c300 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Init()
325 MODIFY_REG(hswpmi->Instance->CR, \ in HAL_SWPMI_Init()
333 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Init()
361 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_DeInit()
364 CLEAR_BIT(hswpmi->Instance->CR, SWPMI_CR_LPBK); in HAL_SWPMI_DeInit()
694 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Transmit()
802 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Receive()
906 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Transmit_IT()
973 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Receive_IT()
1036 SET_BIT(hswpmi->Instance->CR, SWPMI_CR_SWPACT); in HAL_SWPMI_Transmit_DMA()
[all …]
/loramac-node-3.4.0/src/boards/NucleoL476/
DsysIrqHandlers.c119 CLEAR_BIT( FLASH->CR, FLASH_CR_BKER ); in HardFault_Handler()
126 CLEAR_BIT( FLASH->CR, FLASH_CR_BKER ); in HardFault_Handler()
130 SET_BIT( FLASH->CR, FLASH_CR_BKER ); in HardFault_Handler()
136 MODIFY_REG( FLASH->CR, FLASH_CR_PNB, ( page << POSITION_VAL( FLASH_CR_PNB ) ) ); in HardFault_Handler()
137 SET_BIT( FLASH->CR, FLASH_CR_PER ); in HardFault_Handler()
138 SET_BIT( FLASH->CR, FLASH_CR_STRT ); in HardFault_Handler()
143 CLEAR_BIT( FLASH->CR, ( FLASH_CR_PER | FLASH_CR_PNB ) ); in HardFault_Handler()
152 SET_BIT( FLASH->CR, FLASH_CR_PG ); in HardFault_Handler()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal.c387 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_EnableDBGSleepMode()
396 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_DisableDBGSleepMode()
405 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_EnableDBGStopMode()
414 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_DisableDBGStopMode()
423 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_EnableDBGStandbyMode()
432 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_DisableDBGStandbyMode()

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