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Searched refs:CMAR (Results 1 – 17 of 17) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_dma.c284 hdma->Instance->CMAR = 0U; in HAL_DMA_DeInit()
787 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
796 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
Dstm32l0xx_ll_dma.c216 LL_DMA_WriteReg(tmp, CMAR, 0U); in LL_DMA_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_dma.h1005 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA, in LL_DMA_ConfigAddresses()
1015 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA, in LL_DMA_ConfigAddresses()
1038 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA, in LL_DMA_SetMemoryAddress()
1081 …BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, in LL_DMA_GetMemoryAddress()
1146 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA, in LL_DMA_SetM2MDstAddress()
1188 …BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, in LL_DMA_GetM2MDstAddress()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_dma.c290 hdma->Instance->CMAR = 0; in HAL_DMA_DeInit()
883 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
892 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
Dstm32l1xx_ll_dma.c217 LL_DMA_WriteReg(tmp, CMAR, 0U); in LL_DMA_DeInit()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_dma.h990 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
997 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1020 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1062 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1126 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1166 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_dma.h1055 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
1062 …nnel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
1085 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
1127 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetMemoryAddress()
1191 …l_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1231 …G(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR)); in LL_DMA_GetM2MDstAddress()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_dma.c229 LL_DMA_WriteReg(tmp, CMAR, 0U); in LL_DMA_DeInit()
Dstm32l4xx_hal_dma.c1102 hdma->Instance->CMAR = SrcAddress; in DMA_SetConfig()
1111 hdma->Instance->CMAR = DstAddress; in DMA_SetConfig()
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h238 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h256 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h265 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h265 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h255 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h274 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h276 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h426 __IO uint32_t CMAR; /*!< DMA channel x memory address register */ member