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Searched refs:CFGR1 (Results 1 – 18 of 18) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_system.h476 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_EnableFirewall()
486 return !(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) == SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_IsEnabledFirewall()
505 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
524 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
546 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
568 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
578 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
588 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
598 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
608 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
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Dstm32l4xx_hal.h456 … SET_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
460 … CLEAR_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
508 … SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
512 … CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
Dstm32l4xx_hal_firewall.h168 #define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS)
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_adc.h1929 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1946 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1966 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
1981 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2036 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2086 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2203 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2236 register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2263 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
2283 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
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Dstm32l0xx_hal.h271 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
275 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE…
280 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE…
329 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)
Dstm32l0xx_ll_system.h305 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
318 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
332 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB, Bank); in LL_SYSCFG_SetFlashBankMode()
344 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB)); in LL_SYSCFG_GetFlashBankMode()
362 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)); in LL_SYSCFG_GetBootMode()
Dstm32l0xx_hal_adc.h679 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
687 (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET)
787 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3U)*2U))
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_adc.c445 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES); in HAL_ADC_Init()
446 hadc->Instance->CFGR1 |= hadc->Init.Resolution; in HAL_ADC_Init()
471 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN | in HAL_ADC_Init()
482 hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | in HAL_ADC_Init()
497 hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv | in HAL_ADC_Init()
507 hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN); in HAL_ADC_Init()
645 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \ in HAL_ADC_DeInit()
905 if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) in HAL_ADC_PollForConversion()
1284 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; in HAL_ADC_Start_DMA()
1330 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN); in HAL_ADC_Stop_DMA()
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Dstm32l0xx_hal_adc_ex.c149 …backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMAC… in HAL_ADCEx_Calibration_Start()
150 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); in HAL_ADCEx_Calibration_Start()
175 SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); in HAL_ADCEx_Calibration_Start()
Dstm32l0xx_ll_adc.c385 CLEAR_BIT(ADCx->CFGR1, in LL_ADC_DeInit()
499 MODIFY_REG(ADCx->CFGR1, in LL_ADC_Init()
594 MODIFY_REG(ADCx->CFGR1, in LL_ADC_REG_Init()
Dstm32l0xx_hal.c498 return (SYSCFG->CFGR1 & SYSCFG_CFGR1_BOOT_MODE); in HAL_SYSCFG_GetBootMode()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_i2c_ex.c306 SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_EnableFastModePlus()
335 CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_DisableFastModePlus()
Dstm32l4xx_hal.c686 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOAnalogSwitchBooster()
696 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_DisableIOAnalogSwitchBooster()
Dstm32l4xx_hal_firewall.c240 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS); in HAL_FIREWALL_EnableFirewall()
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h147 …__IO uint32_t CFGR1; /*!< ADC Configuration register 1, Addre… member
337 …__IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offs… member
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h150 …__IO uint32_t CFGR1; /*!< ADC Configuration register 1, Addre… member
355 …__IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offs… member
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h149 …__IO uint32_t CFGR1; /*!< ADC Configuration register 1, Addre… member
354 …__IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offs… member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h897 …__IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offset:… member