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Searched refs:CCMR2 (Results 1 – 17 of 17) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_tim.c2748 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00) in HAL_TIM_IRQHandler()
2769 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00) in HAL_TIM_IRQHandler()
2961 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; in HAL_TIM_IC_ConfigChannel()
2964 htim->Instance->CCMR2 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
2977 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; in HAL_TIM_IC_ConfigChannel()
2980 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8); in HAL_TIM_IC_ConfigChannel()
3054 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; in HAL_TIM_PWM_ConfigChannel()
3057 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; in HAL_TIM_PWM_ConfigChannel()
3058 htim->Instance->CCMR2 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3069 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l1xx_ll_tim.c648 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
666 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
707 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
725 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
824 MODIFY_REG(TIMx->CCMR2, in IC3Config()
857 MODIFY_REG(TIMx->CCMR2, in IC4Config()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_tim.c2738 if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) in HAL_TIM_IRQHandler()
2759 if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) in HAL_TIM_IRQHandler()
2949 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; in HAL_TIM_IC_ConfigChannel()
2952 htim->Instance->CCMR2 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
2965 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; in HAL_TIM_IC_ConfigChannel()
2968 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3042 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; in HAL_TIM_PWM_ConfigChannel()
3045 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; in HAL_TIM_PWM_ConfigChannel()
3046 htim->Instance->CCMR2 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3057 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l0xx_ll_tim.c626 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
644 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
685 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
703 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
802 MODIFY_REG(TIMx->CCMR2, in IC3Config()
835 MODIFY_REG(TIMx->CCMR2, in IC4Config()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_tim.c3174 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) in HAL_TIM_IRQHandler()
3204 if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) in HAL_TIM_IRQHandler()
3486 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; in HAL_TIM_IC_ConfigChannel()
3489 htim->Instance->CCMR2 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
3502 htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; in HAL_TIM_IC_ConfigChannel()
3505 htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3590 htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; in HAL_TIM_PWM_ConfigChannel()
3593 htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; in HAL_TIM_PWM_ConfigChannel()
3594 htim->Instance->CCMR2 |= sConfig->OCFastMode; in HAL_TIM_PWM_ConfigChannel()
3607 htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l4xx_ll_tim.c980 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC3Config()
1016 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC3Config()
1059 tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); in OC4Config()
1086 LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); in OC4Config()
1305 MODIFY_REG(TIMx->CCMR2, in IC3Config()
1338 MODIFY_REG(TIMx->CCMR2, in IC4Config()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_tim.h1425 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
1426 (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U)
1487 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\
1488 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE) :\
1508 …((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\
1509 …((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE) :\
1860 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
1861 ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U)))
1866 …((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) …
1867 ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_tim.h988 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
989 ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8)))
999 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) :\
1000 ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC))
1331 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
1332 (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_tim.h1041 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
1042 ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8)))
1047 …((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) …
1048 ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
1188 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
1189 (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U)
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h493 …__IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h534 …__IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h492 __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h492 __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h520 …__IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h560 __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h575 __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h919 __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ member