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Searched refs:CCMR1 (Results 1 – 21 of 21) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_tim.h1333 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_ConfigOutput()
1366 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_SetMode()
1395 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_GetMode()
1462 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableFast()
1484 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisableFast()
1506 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledFast()
1528 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnablePreload()
1549 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisablePreload()
1570 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledPreload()
1595 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableClear()
[all …]
Dstm32l1xx_hal_tim.h986 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
987 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\
997 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) :\
998 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) :\
1329 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
1330 ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_tim.h1358 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_ConfigOutput()
1391 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_SetMode()
1420 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_GetMode()
1487 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableFast()
1509 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisableFast()
1531 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledFast()
1553 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnablePreload()
1574 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisablePreload()
1595 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledPreload()
1620 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableClear()
[all …]
Dstm32l0xx_hal_tim.h1039 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
1040 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) :\
1045 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) …
1046 …((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) …
1186 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
1187 ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_tim.c2216 tmpccmr1 = htim->Instance->CCMR1; in HAL_TIM_Encoder_Init()
2243 htim->Instance->CCMR1 = tmpccmr1; in HAL_TIM_Encoder_Init()
2705 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00) in HAL_TIM_IRQHandler()
2727 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00) in HAL_TIM_IRQHandler()
2929 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIM_IC_ConfigChannel()
2932 htim->Instance->CCMR1 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
2945 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; in HAL_TIM_IC_ConfigChannel()
2948 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8); in HAL_TIM_IC_ConfigChannel()
3024 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; in HAL_TIM_PWM_ConfigChannel()
3027 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l1xx_ll_tim.c453 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in LL_TIM_ENCODER_Init()
480 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
530 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC1Config()
548 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
589 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC2Config()
607 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
758 MODIFY_REG(TIMx->CCMR1, in IC1Config()
791 MODIFY_REG(TIMx->CCMR1, in IC2Config()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_tim.c2209 tmpccmr1 = htim->Instance->CCMR1; in HAL_TIM_Encoder_Init()
2236 htim->Instance->CCMR1 = tmpccmr1; in HAL_TIM_Encoder_Init()
2695 if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) in HAL_TIM_IRQHandler()
2717 if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) in HAL_TIM_IRQHandler()
2917 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIM_IC_ConfigChannel()
2920 htim->Instance->CCMR1 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
2933 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; in HAL_TIM_IC_ConfigChannel()
2936 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3012 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; in HAL_TIM_PWM_ConfigChannel()
3015 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l0xx_ll_tim.c430 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in LL_TIM_ENCODER_Init()
457 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
508 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC1Config()
526 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
567 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC2Config()
585 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
736 MODIFY_REG(TIMx->CCMR1, in IC1Config()
769 MODIFY_REG(TIMx->CCMR1, in IC2Config()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_tim.c2600 tmpccmr1 = htim->Instance->CCMR1; in HAL_TIM_Encoder_Init()
2627 htim->Instance->CCMR1 = tmpccmr1; in HAL_TIM_Encoder_Init()
3113 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) in HAL_TIM_IRQHandler()
3144 if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) in HAL_TIM_IRQHandler()
3454 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIM_IC_ConfigChannel()
3457 htim->Instance->CCMR1 |= sConfig->ICPrescaler; in HAL_TIM_IC_ConfigChannel()
3470 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; in HAL_TIM_IC_ConfigChannel()
3473 htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U); in HAL_TIM_IC_ConfigChannel()
3556 htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; in HAL_TIM_PWM_ConfigChannel()
3559 htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; in HAL_TIM_PWM_ConfigChannel()
[all …]
Dstm32l4xx_ll_tim.c550 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in LL_TIM_ENCODER_Init()
577 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
640 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in LL_TIM_HALLSENSOR_Init()
681 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
822 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC1Config()
858 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
901 tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); in OC2Config()
937 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
1239 MODIFY_REG(TIMx->CCMR1, in IC1Config()
1272 MODIFY_REG(TIMx->CCMR1, in IC2Config()
Dstm32l4xx_hal_tim_ex.c198 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; in HAL_TIMEx_HallSensor_Init()
200 htim->Instance->CCMR1 |= sConfig->IC1Prescaler; in HAL_TIMEx_HallSensor_Init()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_tim.h2066 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_ConfigOutput()
2111 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_SetMode()
2150 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_GetMode()
2310 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableFast()
2336 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisableFast()
2362 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledFast()
2388 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnablePreload()
2413 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_DisablePreload()
2438 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_IsEnabledPreload()
2467 …register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCha… in LL_TIM_OC_EnableClear()
[all …]
Dstm32l4xx_hal_tim.h1423 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
1424 ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) :\
1485 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\
1486 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\
1506 …(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) …
1507 …((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\
1858 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
1859 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) :\
1864 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) …
1865 …((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) …
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h492 …__IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h533 …__IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h491 __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h491 __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h519 …__IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/NAMote72/cmsis/
Dstm32l152xc.h559 __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h574 __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h918 __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ member