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Searched refs:BUPDIV (Results 1 – 2 of 2) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_mclk_l21.h388 ((Mclk *)hw)->BUPDIV.reg |= MCLK_BUPDIV_BUPDIV(mask); in hri_mclk_set_BUPDIV_BUPDIV_bf()
395 tmp = ((Mclk *)hw)->BUPDIV.reg; in hri_mclk_get_BUPDIV_BUPDIV_bf()
404 tmp = ((Mclk *)hw)->BUPDIV.reg; in hri_mclk_write_BUPDIV_BUPDIV_bf()
407 ((Mclk *)hw)->BUPDIV.reg = tmp; in hri_mclk_write_BUPDIV_BUPDIV_bf()
414 ((Mclk *)hw)->BUPDIV.reg &= ~MCLK_BUPDIV_BUPDIV(mask); in hri_mclk_clear_BUPDIV_BUPDIV_bf()
421 ((Mclk *)hw)->BUPDIV.reg ^= MCLK_BUPDIV_BUPDIV(mask); in hri_mclk_toggle_BUPDIV_BUPDIV_bf()
428 tmp = ((Mclk *)hw)->BUPDIV.reg; in hri_mclk_read_BUPDIV_BUPDIV_bf()
436 ((Mclk *)hw)->BUPDIV.reg |= mask; in hri_mclk_set_BUPDIV_reg()
443 tmp = ((Mclk *)hw)->BUPDIV.reg; in hri_mclk_get_BUPDIV_reg()
451 ((Mclk *)hw)->BUPDIV.reg = data; in hri_mclk_write_BUPDIV_reg()
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/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dmclk.h178 uint8_t BUPDIV:8; /*!< bit: 0.. 7 Backup Clock Division Factor */ member
477 …__IO MCLK_BUPDIV_Type BUPDIV; /**< \brief Offset: 0x06 (R/W 8) Backup Clock Divisio… member