ADC_CHSELR_CHSEL5 (reference) in projects: loramac-node-3.4.0

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Searched refs:ADC_CHSELR_CHSEL5 (Results 1 – 6 of 6) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
D	stm32l0xx_ll_adc.c	`413 \| ADC_CHSELR_CHSEL7 \| ADC_CHSELR_CHSEL6 \| ADC_CHSELR_CHSEL5 \| ADC_CHSELR_CHSEL4 in LL_ADC_DeInit() 421 \| ADC_CHSELR_CHSEL7 \| ADC_CHSELR_CHSEL6 \| ADC_CHSELR_CHSEL5 \| ADC_CHSELR_CHSEL4 in LL_ADC_DeInit()`
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
D	stm32l0xx_ll_adc.h	`139 #define ADC_CHANNEL_5_BITFIELD (ADC_CHSELR_CHSEL5) 881 … (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \ 947 … (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \ 2685 … \| (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5) in LL_ADC_REG_GetSequencerChannels()`
D	stm32l0xx_hal_adc.h	`435 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)\| ADC_CFGR1_AWDCH_2\| ADC_CFGR1_AWDCH_…`
/loramac-node-3.4.0/src/boards/SKiM881AXL/cmsis/
D	stm32l081xx.h	`931 #define ADC_CHSELR_CHSEL5 ADC_CHSELR_CHSEL5_Msk /*!< Channel 5 selec… macro`
/loramac-node-3.4.0/src/boards/NucleoL073/cmsis/
D	stm32l073xx.h	`1043 #define ADC_CHSELR_CHSEL5 ADC_CHSELR_CHSEL5_Msk /*!< Channel 5 selec… macro`
/loramac-node-3.4.0/src/boards/B-L072Z-LRWAN1/cmsis/
D	stm32l072xx.h	`1024 #define ADC_CHSELR_CHSEL5 ADC_CHSELR_CHSEL5_Msk /*!< Channel 5 selec… macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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