__VALUE__ (reference) in projects: loramac-node-2.7.6

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Searched refs:__VALUE__ (Results 1 – 25 of 112) sorted by relevance

12 3 4 5

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
D	stm32l1xx_ll_spi.c	79 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 80 \|\| ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 81 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 82 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 84 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 85 \|\| ((__VALUE__) == LL_SPI_MODE_SLAVE)) 87 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ argument 88 \|\| ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT)) 90 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ argument 91 \|\| ((__VALUE__) == LL_SPI_POLARITY_HIGH)) [all …]
D	stm32l1xx_ll_gpio.c	63 #define IS_LL_GPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GP… argument 65 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) \|\|\ argument 66 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) \|\|\ 67 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) \|\|\ 68 ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 70 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) \|\|\ argument 71 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 73 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) \|\|\ argument 74 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) \|\|\ 75 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) \|\|\ [all …]
D	stm32l1xx_ll_utils.c	84 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 85 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 86 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 87 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 88 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 89 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 90 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 91 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 92 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 94 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
D	stm32l1xx_ll_usart.c	78 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ argument 79 \|\| ((__VALUE__) == LL_USART_DIRECTION_RX) \ 80 \|\| ((__VALUE__) == LL_USART_DIRECTION_TX) \ 81 \|\| ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) 83 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ argument 84 \|\| ((__VALUE__) == LL_USART_PARITY_EVEN) \ 85 \|\| ((__VALUE__) == LL_USART_PARITY_ODD)) 87 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ argument 88 \|\| ((__VALUE__) == LL_USART_DATAWIDTH_9B)) 90 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ argument [all …]
D	stm32l1xx_ll_tim.c	64 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ argument 65 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \ 66 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \ 67 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \ 68 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN)) 70 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ argument 71 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \ 72 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4)) 74 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ argument 75 \|\| ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \ [all …]
D	stm32l1xx_ll_dma.c	63 #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY)… argument 64 … ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) \|\| \ 65 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY)) 67 #define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) \|\| \ argument 68 ((__VALUE__) == LL_DMA_MODE_CIRCULAR)) 70 #define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) \|\| \ argument 71 ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT)) 73 #define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) \|\| \ argument 74 ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT)) 76 #define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) \|\| \ argument [all …]
D	stm32l1xx_ll_i2c.c	65 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) \|\| \ argument 66 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) \|\| \ 67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) \|\| \ 68 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 70 #define IS_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_S… argument 72 #define IS_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) \|\| \ argument 73 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9)) 75 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) argument 77 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) \|\| \ argument 78 ((__VALUE__) == LL_I2C_NACK)) [all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
D	stm32l0xx_ll_spi.c	79 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 80 \|\| ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 81 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 82 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 84 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 85 \|\| ((__VALUE__) == LL_SPI_MODE_SLAVE)) 87 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ argument 88 \|\| ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT)) 90 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ argument 91 \|\| ((__VALUE__) == LL_SPI_POLARITY_HIGH)) [all …]
D	stm32l0xx_ll_dma.c	63 #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY)… argument 64 … ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) \|\| \ 65 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY)) 67 #define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) \|\| \ argument 68 ((__VALUE__) == LL_DMA_MODE_CIRCULAR)) 70 #define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) \|\| \ argument 71 ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT)) 73 #define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) \|\| \ argument 74 ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT)) 76 #define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) \|\| \ argument [all …]
D	stm32l0xx_ll_utils.c	84 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 85 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 86 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 87 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 88 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 89 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 90 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 91 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 92 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 94 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
D	stm32l0xx_ll_usart.c	78 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ argument 79 \|\| ((__VALUE__) == LL_USART_DIRECTION_RX) \ 80 \|\| ((__VALUE__) == LL_USART_DIRECTION_TX) \ 81 \|\| ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) 83 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ argument 84 \|\| ((__VALUE__) == LL_USART_PARITY_EVEN) \ 85 \|\| ((__VALUE__) == LL_USART_PARITY_ODD)) 87 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \ argument 88 \|\| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \ 89 \|\| ((__VALUE__) == LL_USART_DATAWIDTH_9B)) [all …]
D	stm32l0xx_ll_gpio.c	63 #define IS_LL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) && ((__VALUE__)… argument 65 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) \|\|\ argument 66 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) \|\|\ 67 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) \|\|\ 68 ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 70 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) \|\|\ argument 71 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 73 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) \|\|\ argument 74 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) \|\|\ 75 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) \|\|\ [all …]
D	stm32l0xx_ll_lpuart.c	84 #define IS_LL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == LL_LPUART_DIRECTION_NONE) \ argument 85 \|\| ((__VALUE__) == LL_LPUART_DIRECTION_RX) \ 86 \|\| ((__VALUE__) == LL_LPUART_DIRECTION_TX) \ 87 \|\| ((__VALUE__) == LL_LPUART_DIRECTION_TX_RX)) 89 #define IS_LL_LPUART_PARITY(__VALUE__) (((__VALUE__) == LL_LPUART_PARITY_NONE) \ argument 90 \|\| ((__VALUE__) == LL_LPUART_PARITY_EVEN) \ 91 \|\| ((__VALUE__) == LL_LPUART_PARITY_ODD)) 93 #define IS_LL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_LPUART_DATAWIDTH_7B) \ argument 94 \|\| ((__VALUE__) == LL_LPUART_DATAWIDTH_8B) \ 95 \|\| ((__VALUE__) == LL_LPUART_DATAWIDTH_9B)) [all …]
D	stm32l0xx_ll_tim.c	64 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ argument 65 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \ 66 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \ 67 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \ 68 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN)) 70 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ argument 71 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \ 72 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4)) 74 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ argument 75 \|\| ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \ [all …]
D	stm32l0xx_ll_lptim.c	64 #define IS_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ argument 65 \|\| ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 67 #define IS_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ argument 68 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 69 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 70 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 71 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 72 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 73 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 74 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) [all …]
D	stm32l0xx_ll_i2c.c	64 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) \|\| \ argument 65 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) \|\| \ 66 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) \|\| \ 67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 69 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) \|\| \ argument 70 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 72 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) argument 74 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) argument 76 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) \|\| \ argument 77 ((__VALUE__) == LL_I2C_NACK)) [all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
D	stm32l4xx_hal_tsc.h	`652 #define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) \|\| \ argument 653 ((__VALUE__) == TSC_CTPH_2CYCLES) \|\| \ 654 ((__VALUE__) == TSC_CTPH_3CYCLES) \|\| \ 655 ((__VALUE__) == TSC_CTPH_4CYCLES) \|\| \ 656 ((__VALUE__) == TSC_CTPH_5CYCLES) \|\| \ 657 ((__VALUE__) == TSC_CTPH_6CYCLES) \|\| \ 658 ((__VALUE__) == TSC_CTPH_7CYCLES) \|\| \ 659 ((__VALUE__) == TSC_CTPH_8CYCLES) \|\| \ 660 ((__VALUE__) == TSC_CTPH_9CYCLES) \|\| \ 661 ((__VALUE__) == TSC_CTPH_10CYCLES) \|\| \ [all …]`
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
D	stm32l4xx_ll_spi.c	78 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument 79 \|\| ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ 80 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ 81 \|\| ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) 83 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument 84 \|\| ((__VALUE__) == LL_SPI_MODE_SLAVE)) 86 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \ argument 87 \|\| ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \ 88 \|\| ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \ 89 \|\| ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \ [all …]
D	stm32l4xx_ll_usart.c	75 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \ argument 76 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV2) \ 77 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV4) \ 78 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV6) \ 79 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV8) \ 80 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV10) \ 81 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV12) \ 82 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV16) \ 83 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV32) \ 84 \|\| ((__VALUE__) == LL_USART_PRESCALER_DIV64) \ [all …]
D	stm32l4xx_ll_lpuart.c	77 #define IS_LL_LPUART_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPUART_PRESCALER_DIV1) \ argument 78 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV2) \ 79 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV4) \ 80 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV6) \ 81 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV8) \ 82 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV10) \ 83 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV12) \ 84 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV16) \ 85 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV32) \ 86 \|\| ((__VALUE__) == LL_LPUART_PRESCALER_DIV64) \ [all …]
D	stm32l4xx_ll_gpio.c	68 #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN… argument 70 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) \|\|\ argument 71 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) \|\|\ 72 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) \|\|\ 73 ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 75 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) \|\|\ argument 76 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 78 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) \|\|\ argument 79 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) \|\|\ 80 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) \|\|\ [all …]
D	stm32l4xx_ll_tim.c	64 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ argument 65 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \ 66 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \ 67 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \ 68 \|\| ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN)) 70 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ argument 71 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \ 72 \|\| ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4)) 74 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ argument 75 \|\| ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \ [all …]
D	stm32l4xx_ll_dma.c	63 #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY)… argument 64 … ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) \|\| \ 65 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY)) 67 #define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) \|\| \ argument 68 ((__VALUE__) == LL_DMA_MODE_CIRCULAR)) 70 #define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) \|\| \ argument 71 ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT)) 73 #define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) \|\| \ argument 74 ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT)) 76 #define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) \|\| \ argument [all …]
D	stm32l4xx_ll_utils.c	104 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument 105 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ 106 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ 107 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ 108 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 109 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 110 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ 111 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ 112 \|\| ((__VALUE__) == LL_RCC_SYSCLK_DIV_512)) 114 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument [all …]
D	stm32l4xx_ll_lptim.c	64 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ argument 65 \|\| ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 67 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ argument 68 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 69 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 70 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 71 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 72 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 73 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 74 \|\| ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) [all …]

12 3 4 5

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0