Searched refs:TIM_DCR_DBA_2 (Results 1 – 11 of 11) sorted by relevance
621 #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 …622 #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …623 #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …624 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …629 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2) …630 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …631 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …632 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM…637 #define LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) …638 #define LL_TIM_DMABURST_BASEADDR_OR1 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …[all …]
1083 #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 …1084 #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …1085 #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …1086 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …1091 #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2) …1092 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …1093 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …1094 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM…1099 #define LL_TIM_DMABURST_BASEADDR_CCR6 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) …1100 #define LL_TIM_DMABURST_BASEADDR_OR1 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …[all …]
618 #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 …619 #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …620 #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …621 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …626 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …627 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …628 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM…630 #define LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …
5805 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
6167 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
6326 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
6063 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
6887 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
7189 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
14608 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro