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Searched refs:TIM_CR1_UDIS (Results 1 – 11 of 11) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_tim.h921 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
932 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
943 return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS)); in LL_TIM_IsEnabledUpdateEvent()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_tim.h954 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
965 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
976 return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS)); in LL_TIM_IsEnabledUpdateEvent()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_tim.h1493 CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_EnableUpdateEvent()
1504 SET_BIT(TIMx->CR1, TIM_CR1_UDIS); in LL_TIM_DisableUpdateEvent()
1515 return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); in LL_TIM_IsEnabledUpdateEvent()
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h5391 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h5753 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h5912 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h5648 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h5648 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h6472 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h6774 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h13969 #define TIM_CR1_UDIS TIM_CR1_UDIS_Msk /*!<Update disable */ macro