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Searched refs:READ_REG (Results 1 – 25 of 106) sorted by relevance

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/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_firewall.c199 fw_config->CodeSegmentStartAddress = (READ_REG(FIREWALL->CSSA) & FW_CSSA_ADD); in HAL_FIREWALL_GetConfig()
200 fw_config->CodeSegmentLength = (READ_REG(FIREWALL->CSL) & FW_CSL_LENG); in HAL_FIREWALL_GetConfig()
203 fw_config->NonVDataSegmentStartAddress = (READ_REG(FIREWALL->NVDSSA) & FW_NVDSSA_ADD); in HAL_FIREWALL_GetConfig()
204 fw_config->NonVDataSegmentLength = (READ_REG(FIREWALL->NVDSL) & FW_NVDSL_LENG); in HAL_FIREWALL_GetConfig()
207 fw_config->VDataSegmentStartAddress = (READ_REG(FIREWALL->VDSSA) & FW_VDSSA_ADD); in HAL_FIREWALL_GetConfig()
208 fw_config->VDataSegmentLength = (READ_REG(FIREWALL->VDSL) & FW_VDSL_LENG); in HAL_FIREWALL_GetConfig()
211 fw_config->VolatileDataExecution = (READ_REG(FIREWALL->CR) & FW_CR_VDE); in HAL_FIREWALL_GetConfig()
214 fw_config->VolatileDataShared = (READ_REG(FIREWALL->CR) & FW_CR_VDS); in HAL_FIREWALL_GetConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_firewall.c208 fw_config->CodeSegmentStartAddress = (READ_REG(FIREWALL->CSSA) & FW_CSSA_ADD); in HAL_FIREWALL_GetConfig()
209 fw_config->CodeSegmentLength = (READ_REG(FIREWALL->CSL) & FW_CSL_LENG); in HAL_FIREWALL_GetConfig()
212 fw_config->NonVDataSegmentStartAddress = (READ_REG(FIREWALL->NVDSSA) & FW_NVDSSA_ADD); in HAL_FIREWALL_GetConfig()
213 fw_config->NonVDataSegmentLength = (READ_REG(FIREWALL->NVDSL) & FW_NVDSL_LENG); in HAL_FIREWALL_GetConfig()
216 fw_config->VDataSegmentStartAddress = (READ_REG(FIREWALL->VDSSA) & FW_VDSSA_ADD); in HAL_FIREWALL_GetConfig()
217 fw_config->VDataSegmentLength = (READ_REG(FIREWALL->VDSL) & FW_VDSL_LENG); in HAL_FIREWALL_GetConfig()
220 fw_config->VolatileDataExecution = (READ_REG(FIREWALL->CR) & FW_CR_VDE); in HAL_FIREWALL_GetConfig()
223 fw_config->VolatileDataShared = (READ_REG(FIREWALL->CR) & FW_CR_VDS); in HAL_FIREWALL_GetConfig()
Dstm32l4xx_hal_usart_ex.c204 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_EnableSlaveMode()
252 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_DisableSlaveMode()
301 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_ConfigNSS()
340 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_EnableFifoMode()
381 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_DisableFifoMode()
428 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_SetTxFifoThreshold()
477 tmpcr1 = READ_REG(husart->Instance->CR1); in HAL_USARTEx_SetRxFifoThreshold()
Dstm32l4xx_hal_smartcard_ex.c297 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_EnableFifoMode()
338 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_DisableFifoMode()
385 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_SetTxFifoThreshold()
434 tmpcr1 = READ_REG(hsmartcard->Instance->CR1); in HAL_SMARTCARDEx_SetRxFifoThreshold()
Dstm32l4xx_hal_flash_ex.c1213 uint32_t user_config = READ_REG(FLASH->OPTR); in FLASH_OB_GetUser()
1267 reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); in FLASH_OB_GetPCROP()
1270 reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); in FLASH_OB_GetPCROP()
1275 reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); in FLASH_OB_GetPCROP()
1278 reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); in FLASH_OB_GetPCROP()
1291 reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); in FLASH_OB_GetPCROP()
1294 reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); in FLASH_OB_GetPCROP()
1302 reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); in FLASH_OB_GetPCROP()
1305 reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); in FLASH_OB_GetPCROP()
1315 *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP); in FLASH_OB_GetPCROP()
Dstm32l4xx_hal.c433 return(READ_REG(*((uint32_t *)UID_BASE))); in HAL_GetUIDw0()
442 return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); in HAL_GetUIDw1()
451 return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); in HAL_GetUIDw2()
Dstm32l4xx_hal_uart_ex.c567 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_EnableFifoMode()
608 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_DisableFifoMode()
655 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_SetTxFifoThreshold()
704 tmpcr1 = READ_REG(huart->Instance->CR1); in HAL_UARTEx_SetRxFifoThreshold()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_crc.h145 #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
292 return (uint32_t)(READ_REG(CRCx->INIT)); in LL_CRC_GetInitialData()
323 return (uint32_t)(READ_REG(CRCx->POL)); in LL_CRC_GetPolynomialCoef()
378 return (uint32_t)(READ_REG(CRCx->DR)); in LL_CRC_ReadData32()
390 return (uint16_t)READ_REG(CRCx->DR); in LL_CRC_ReadData16()
402 return (uint8_t)READ_REG(CRCx->DR); in LL_CRC_ReadData8()
414 return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); in LL_CRC_ReadData7()
426 return (uint32_t)(READ_REG(CRCx->IDR)); in LL_CRC_Read_IDR()
Dstm32l0xx_ll_utils.h187 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); in LL_GetUID_Word0()
196 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); in LL_GetUID_Word1()
205 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); in LL_GetUID_Word2()
216 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); in LL_GetFlashSize()
Dstm32l0xx_ll_iwdg.h136 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
233 return (uint32_t)(READ_REG(IWDGx->PR)); in LL_IWDG_GetPrescaler()
256 return (uint32_t)(READ_REG(IWDGx->RLR)); in LL_IWDG_GetReloadCounter()
279 return (uint32_t)(READ_REG(IWDGx->WINR)); in LL_IWDG_GetWindow()
Dstm32l0xx_ll_gpio.h238 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
691 temp = READ_REG(GPIOx->LCKR); in LL_GPIO_LockPin()
751 return (uint32_t)(READ_REG(GPIOx->IDR)); in LL_GPIO_ReadInputPort()
803 return (uint32_t)(READ_REG(GPIOx->ODR)); in LL_GPIO_ReadOutputPort()
919 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask); in LL_GPIO_TogglePin()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_crc.h145 #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
292 return (uint32_t)(READ_REG(CRCx->INIT)); in LL_CRC_GetInitialData()
323 return (uint32_t)(READ_REG(CRCx->POL)); in LL_CRC_GetPolynomialCoef()
381 return (uint32_t)(READ_REG(CRCx->DR)); in LL_CRC_ReadData32()
393 return (uint16_t)READ_REG(CRCx->DR); in LL_CRC_ReadData16()
405 return (uint8_t)READ_REG(CRCx->DR); in LL_CRC_ReadData8()
417 return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); in LL_CRC_ReadData7()
430 return (uint32_t)(READ_REG(CRCx->IDR)); in LL_CRC_Read_IDR()
Dstm32l4xx_ll_utils.h220 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); in LL_GetUID_Word0()
229 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); in LL_GetUID_Word1()
238 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); in LL_GetUID_Word2()
249 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU); in LL_GetFlashSize()
276 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU); in LL_GetPackageType()
Dstm32l4xx_ll_iwdg.h136 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
233 return (READ_REG(IWDGx->PR)); in LL_IWDG_GetPrescaler()
256 return (READ_REG(IWDGx->RLR)); in LL_IWDG_GetReloadCounter()
279 return (READ_REG(IWDGx->WINR)); in LL_IWDG_GetWindow()
Dstm32l4xx_ll_gpio.h254 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
804 temp = READ_REG(GPIOx->LCKR); in LL_GPIO_LockPin()
864 return (uint32_t)(READ_REG(GPIOx->IDR)); in LL_GPIO_ReadInputPort()
916 return (uint32_t)(READ_REG(GPIOx->ODR)); in LL_GPIO_ReadOutputPort()
1032 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask); in LL_GPIO_TogglePin()
Dstm32l4xx_ll_spi.h351 #define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
804 return (uint32_t)(READ_REG(SPIx->CRCPR)); in LL_SPI_GetCRCPolynomial()
815 return (uint32_t)(READ_REG(SPIx->RXCRCR)); in LL_SPI_GetRxCRC()
826 return (uint32_t)(READ_REG(SPIx->TXCRCR)); in LL_SPI_GetTxCRC()
1352 return (uint8_t)(READ_REG(SPIx->DR)); in LL_SPI_ReceiveData8()
1363 return (uint16_t)(READ_REG(SPIx->DR)); in LL_SPI_ReceiveData16()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_utils.h185 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS))); in LL_GetUID_Word0()
194 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U)))); in LL_GetUID_Word1()
203 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); in LL_GetUID_Word2()
218 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS))); in LL_GetFlashSize()
Dstm32l1xx_ll_crc.h89 #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
147 return (uint32_t)(READ_REG(CRCx->DR)); in LL_CRC_ReadData32()
159 return (uint32_t)(READ_REG(CRCx->IDR)); in LL_CRC_Read_IDR()
Dstm32l1xx_ll_iwdg.h135 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
232 return (uint32_t)(READ_REG(IWDGx->PR)); in LL_IWDG_GetPrescaler()
255 return (uint32_t)(READ_REG(IWDGx->RLR)); in LL_IWDG_GetReloadCounter()
Dstm32l1xx_ll_gpio.h242 #define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
730 temp = READ_REG(GPIOx->LCKR); in LL_GPIO_LockPin()
790 return (uint32_t)(READ_REG(GPIOx->IDR)); in LL_GPIO_ReadInputPort()
842 return (uint32_t)(READ_REG(GPIOx->ODR)); in LL_GPIO_ReadOutputPort()
963 WRITE_REG(GPIOx->ODR, READ_REG(GPIOx->ODR) ^ PinMask); in LL_GPIO_TogglePin()
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l0xx.h213 #define READ_REG(REG) ((REG)) macro
215 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |…
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l0xx.h213 #define READ_REG(REG) ((REG)) macro
215 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |…
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l0xx.h213 #define READ_REG(REG) ((REG)) macro
215 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |…
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l1xx.h230 #define READ_REG(REG) ((REG)) macro
232 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |…
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l1xx.h230 #define READ_REG(REG) ((REG)) macro
232 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |…

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