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Searched refs:RCC_PLLP_DIV7 (Results 1 – 3 of 3) sorted by relevance

/loramac-node-2.7.6/src/boards/NucleoL476/
Dboard.c372 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c1603 RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV7; in HAL_RCC_GetOscConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h305 #define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ macro
331 #define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ macro