Home
last modified time | relevance | path

Searched refs:RCC_ICSCR_MSIRANGE_5 (Results 1 – 13 of 13) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_rcc.c273 …ICSCR_MSIRANGE | RCC_ICSCR_MSITRIM), ((0U << RCC_ICSCR_MSITRIM_BITNUMBER) | RCC_ICSCR_MSIRANGE_5)); in HAL_RCC_DeInit()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h219 #define LL_RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */
Dstm32l1xx_hal_rcc.h397 #define RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_rcc.c304 …RANGE | RCC_ICSCR_MSITRIM), (((uint32_t)0 << RCC_ICSCR_MSITRIM_BITNUMBER) | RCC_ICSCR_MSIRANGE_5)); in HAL_RCC_DeInit()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h259 #define LL_RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */
Dstm32l0xx_hal_rcc.h395 #define RCC_MSIRANGE_5 RCC_ICSCR_MSIRANGE_5 /*!< MSI = 2.097 MHz */
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h3491 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h3750 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h3892 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h3784 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h3784 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h4177 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h4247 #define RCC_ICSCR_MSIRANGE_5 (0x5U << RCC_ICSCR_MSIRANGE_Pos) /*!< 0x0000A000 */ macro