Home
last modified time | relevance | path

Searched refs:RCC_CFGR_PLLMUL (Results 1 – 21 of 21) sorted by relevance

/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dsystem_stm32l0xx.c241 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l073xx.h4003 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dsystem_stm32l0xx.c241 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l072xx.h3861 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dsystem_stm32l0xx.c241 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l081xx.h3589 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_rcc.c99 #define RCC_CFGR_PLLMUL_BITNUMBER POSITION_VAL(RCC_CFGR_PLLMUL)
1049 pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; in HAL_RCC_GetSysClockFreq()
1204 RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); in HAL_RCC_GetOscConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h72 #define RCC_POSITION_PLLMUL (uint32_t)POSITION_VAL(RCC_CFGR_PLLMUL) /*!< field position in re…
1256 …MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDi… in LL_RCC_PLL_ConfigDomain_SYS()
1287 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL)); in LL_RCC_PLL_GetMultiplicator()
Dstm32l1xx_hal_rcc.h1593 …MODIFY_REG(RCC->CFGR, (RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL|RCC_CFGR_PLLDIV),((__RCC_PLLSOURCE__) | (__…
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dsystem_stm32l1xx.c248 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l152xe.h4340 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dsystem_stm32l1xx.c248 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l151xba.h3877 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dsystem_stm32l1xx.c248 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l152xc.h4270 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dsystem_stm32l1xx.c248 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in SystemCoreClockUpdate()
Dstm32l151xba.h3877 #define RCC_CFGR_PLLMUL RCC_CFGR_PLLMUL_Msk /*!< PLLMUL[3:0] bit… macro
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_rcc.c1183 pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; in HAL_RCC_GetSysClockFreq()
1351 RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); in HAL_RCC_GetOscConfig()
Dstm32l0xx_hal_rcc_ex.c475 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; in HAL_RCCEx_GetPeriphCLKFreq()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h1866 …MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDi… in LL_RCC_PLL_ConfigDomain_SYS()
1897 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL)); in LL_RCC_PLL_GetMultiplicator()
Dstm32l0xx_hal_rcc.h1393 …MODIFY_REG(RCC->CFGR, (RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL|RCC_CFGR_PLLDIV),((__RCC_PLLSOURCE__) | (__…