Searched refs:RCC_CFGR_PLLDIV (Results 1 – 21 of 21) sorted by relevance
| /loramac-node-2.7.6/src/boards/NucleoL073/cmsis/ |
| D | system_stm32l0xx.c | 242 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l073xx.h | 4022 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/ |
| D | system_stm32l0xx.c | 242 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l072xx.h | 3880 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/ |
| D | system_stm32l0xx.c | 242 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l081xx.h | 3608 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/ |
| D | stm32l1xx_hal_rcc.c | 100 #define RCC_CFGR_PLLDIV_BITNUMBER POSITION_VAL(RCC_CFGR_PLLDIV)
1050 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_BITNUMBER) + 1U; in HAL_RCC_GetSysClockFreq()
1205 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV); in HAL_RCC_GetOscConfig()
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/ |
| D | stm32l1xx_ll_rcc.h | 73 #define RCC_POSITION_PLLDIV (uint32_t)POSITION_VAL(RCC_CFGR_PLLDIV) /*!< field position in re…
1256 …MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDi… in LL_RCC_PLL_ConfigDomain_SYS()
1300 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV)); in LL_RCC_PLL_GetDivider()
|
| D | stm32l1xx_hal_rcc.h | 1593 …MODIFY_REG(RCC->CFGR, (RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL|RCC_CFGR_PLLDIV),((__RCC_PLLSOURCE__) | (__…
|
| /loramac-node-2.7.6/src/boards/NucleoL152/cmsis/ |
| D | system_stm32l1xx.c | 249 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l152xe.h | 4360 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/SKiM980A/cmsis/ |
| D | system_stm32l1xx.c | 249 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l151xba.h | 3897 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/NAMote72/cmsis/ |
| D | system_stm32l1xx.c | 249 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l152xc.h | 4290 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/SKiM880B/cmsis/ |
| D | system_stm32l1xx.c | 249 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in SystemCoreClockUpdate()
|
| D | stm32l151xba.h | 3897 #define RCC_CFGR_PLLDIV RCC_CFGR_PLLDIV_Msk /*!< PLLDIV[1:0] bit… macro
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
| D | stm32l0xx_hal_rcc.c | 1184 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_BITNUMBER) + 1; in HAL_RCC_GetSysClockFreq()
1352 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV); in HAL_RCC_GetOscConfig()
|
| D | stm32l0xx_hal_rcc_ex.c | 476 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; in HAL_RCCEx_GetPeriphCLKFreq()
|
| /loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/ |
| D | stm32l0xx_ll_rcc.h | 1866 …MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | RCC_CFGR_PLLDIV, Source | PLLMul | PLLDi… in LL_RCC_PLL_ConfigDomain_SYS()
1910 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV)); in LL_RCC_PLL_GetDivider()
|
| D | stm32l0xx_hal_rcc.h | 1393 …MODIFY_REG(RCC->CFGR, (RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL|RCC_CFGR_PLLDIV),((__RCC_PLLSOURCE__) | (__…
|
