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Searched refs:RCC_APB1ENR_PWREN (Results 1 – 15 of 15) sorted by relevance

/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dsystem_stm32l1xx.c296 RCC->APB1ENR |= RCC_APB1ENR_PWREN; in SystemInit_ExtMemCtl()
299 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN); in SystemInit_ExtMemCtl()
Dstm32l152xe.h4750 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface… macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dsystem_stm32l1xx.c296 RCC->APB1ENR |= RCC_APB1ENR_PWREN; in SystemInit_ExtMemCtl()
299 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN); in SystemInit_ExtMemCtl()
Dstm32l151xba.h4239 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface… macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dsystem_stm32l1xx.c296 RCC->APB1ENR |= RCC_APB1ENR_PWREN; in SystemInit_ExtMemCtl()
299 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN); in SystemInit_ExtMemCtl()
Dstm32l152xc.h4656 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface… macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dsystem_stm32l1xx.c296 RCC->APB1ENR |= RCC_APB1ENR_PWREN; in SystemInit_ExtMemCtl()
299 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN); in SystemInit_ExtMemCtl()
Dstm32l151xba.h4239 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< Power interface… macro
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_rcc.h780 #define __HAL_RCC_PWR_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_PWREN))
783 #define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_PWREN))
852 #define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN) != RESET)
854 #define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN) == RESET)
Dstm32l0xx_ll_bus.h148 #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN /*!< PWR clock enable */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_rcc.h823 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);\
825 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);\
856 #define __HAL_RCC_PWR_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_PWREN))
1171 #define __HAL_RCC_PWR_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)
1186 #define __HAL_RCC_PWR_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)
Dstm32l1xx_ll_bus.h153 #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h4008 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< PWR clock enabl… macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h4311 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< PWR clock enabl… macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h4459 #define RCC_APB1ENR_PWREN RCC_APB1ENR_PWREN_Msk /*!< PWR clock enabl… macro