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Searched refs:RCC_APB1ENR_I2C1EN (Results 1 – 11 of 11) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_rcc_ex.h723 #define __HAL_RCC_I2C1_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
733 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
743 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) != RESET)
752 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) == RESET)
765 #define __HAL_RCC_I2C1_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
771 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
777 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) != RESET)
782 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN) == RESET)
800 #define __HAL_RCC_I2C1_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
815 #define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C1EN))
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Dstm32l0xx_ll_bus.h138 #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN /*!< I2C1 clock enable */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_rcc.h802 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
804 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
853 #define __HAL_RCC_I2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN))
1168 #define __HAL_RCC_I2C1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)
1183 #define __HAL_RCC_I2C1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)
Dstm32l1xx_ll_bus.h150 #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h4002 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C1 clock enab… macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h4299 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C1 clock enab… macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h4447 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C1 clock enab… macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h4230 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C 1 clock ena… macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h4230 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C 1 clock ena… macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h4647 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C 1 clock ena… macro
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h4741 #define RCC_APB1ENR_I2C1EN RCC_APB1ENR_I2C1EN_Msk /*!< I2C 1 clock ena… macro