Home
last modified time | relevance | path

Searched refs:RCC_APB1ENR_CRSEN (Results 1 – 4 of 4) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_bus.h146 #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR_CRSEN /*!< CRS clock enable */
Dstm32l0xx_hal_rcc_ex.h697 #define __HAL_RCC_CRS_CLK_ENABLE() SET_BIT(RCC->APB1ENR, (RCC_APB1ENR_CRSEN))
698 #define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR,(RCC_APB1ENR_CRSEN))
700 #define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CRSEN) != RESET)
701 #define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CRSEN) == RESET)
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h4308 #define RCC_APB1ENR_CRSEN RCC_APB1ENR_CRSEN_Msk /*!< CRS clock enabl… macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h4456 #define RCC_APB1ENR_CRSEN RCC_APB1ENR_CRSEN_Msk /*!< CRS clock enabl… macro