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Searched refs:Periphs (Results 1 – 6 of 6) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_bus.h342 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
345 SET_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
347 tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_EnableClock()
374 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
376 return ((READ_BIT(RCC->AHB1ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB1_GRP1_IsEnabledClock()
402 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
404 CLEAR_BIT(RCC->AHB1ENR, Periphs); in LL_AHB1_GRP1_DisableClock()
431 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
433 SET_BIT(RCC->AHB1RSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
460 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
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Dstm32l4xx_ll_system.h1179 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_FreezePeriph() argument
1181 SET_BIT(DBGMCU->APB1FZR1, Periphs); in LL_DBGMCU_APB1_GRP1_FreezePeriph()
1194 __STATIC_INLINE void LL_DBGMCU_APB1_GRP2_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP2_FreezePeriph() argument
1196 SET_BIT(DBGMCU->APB1FZR2, Periphs); in LL_DBGMCU_APB1_GRP2_FreezePeriph()
1222 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_UnFreezePeriph() argument
1224 CLEAR_BIT(DBGMCU->APB1FZR1, Periphs); in LL_DBGMCU_APB1_GRP1_UnFreezePeriph()
1237 __STATIC_INLINE void LL_DBGMCU_APB1_GRP2_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP2_UnFreezePeriph() argument
1239 CLEAR_BIT(DBGMCU->APB1FZR2, Periphs); in LL_DBGMCU_APB1_GRP2_UnFreezePeriph()
1255 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_GRP1_FreezePeriph() argument
1257 SET_BIT(DBGMCU->APB2FZ, Periphs); in LL_DBGMCU_APB2_GRP1_FreezePeriph()
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/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_bus.h240 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
243 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
245 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
268 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
270 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
292 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
294 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
317 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
319 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
342 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
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Dstm32l0xx_ll_system.h844 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_FreezePeriph() argument
846 SET_BIT(DBGMCU->APB1FZ, Periphs); in LL_DBGMCU_APB1_GRP1_FreezePeriph()
878 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_UnFreezePeriph() argument
880 CLEAR_BIT(DBGMCU->APB1FZ, Periphs); in LL_DBGMCU_APB1_GRP1_UnFreezePeriph()
894 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_GRP1_FreezePeriph() argument
896 SET_BIT(DBGMCU->APB2FZ, Periphs); in LL_DBGMCU_APB2_GRP1_FreezePeriph()
910 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_GRP1_UnFreezePeriph() argument
912 CLEAR_BIT(DBGMCU->APB2FZ, Periphs); in LL_DBGMCU_APB2_GRP1_UnFreezePeriph()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_bus.h232 __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) in LL_AHB1_GRP1_EnableClock() argument
235 SET_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
237 tmpreg = READ_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_EnableClock()
276 __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) in LL_AHB1_GRP1_IsEnabledClock() argument
278 return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); in LL_AHB1_GRP1_IsEnabledClock()
316 __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) in LL_AHB1_GRP1_DisableClock() argument
318 CLEAR_BIT(RCC->AHBENR, Periphs); in LL_AHB1_GRP1_DisableClock()
357 __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) in LL_AHB1_GRP1_ForceReset() argument
359 SET_BIT(RCC->AHBRSTR, Periphs); in LL_AHB1_GRP1_ForceReset()
398 __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) in LL_AHB1_GRP1_ReleaseReset() argument
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Dstm32l1xx_ll_system.h901 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_FreezePeriph() argument
903 SET_BIT(DBGMCU->APB1FZ, Periphs); in LL_DBGMCU_APB1_GRP1_FreezePeriph()
934 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB1_GRP1_UnFreezePeriph() argument
936 CLEAR_BIT(DBGMCU->APB1FZ, Periphs); in LL_DBGMCU_APB1_GRP1_UnFreezePeriph()
950 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_GRP1_FreezePeriph() argument
952 SET_BIT(DBGMCU->APB2FZ, Periphs); in LL_DBGMCU_APB2_GRP1_FreezePeriph()
966 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs) in LL_DBGMCU_APB2_GRP1_UnFreezePeriph() argument
968 CLEAR_BIT(DBGMCU->APB2FZ, Periphs); in LL_DBGMCU_APB2_GRP1_UnFreezePeriph()