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Searched refs:FCR (Results 1 – 15 of 15) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_lcd.h531 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
537 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
559 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
580 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
601 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
629 …MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BL…
643 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
648 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
663 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_lcd.h399 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
409 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
443 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
464 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
485 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
513 …MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BL…
527 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
541 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
556 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
Dstm32l4xx_hal_qspi.h569 #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, …
Dstm32l4xx_hal_ospi.h755 #define __HAL_OSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, …
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_lcd.h547 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
553 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
575 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
596 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
617 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
645 …MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BL…
659 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
664 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
679 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_lcd.c213 MODIFY_REG(hlcd->Instance->FCR, \ in HAL_LCD_Init()
Dstm32l4xx_hal_ospi.c585 hospi->Instance->FCR = HAL_OSPI_FLAG_TC; in HAL_OSPI_IRQHandler()
608 hospi->Instance->FCR = HAL_OSPI_FLAG_TC; in HAL_OSPI_IRQHandler()
667 hospi->Instance->FCR = HAL_OSPI_FLAG_SM; in HAL_OSPI_IRQHandler()
690 hospi->Instance->FCR = HAL_OSPI_FLAG_TE; in HAL_OSPI_IRQHandler()
736 hospi->Instance->FCR = HAL_OSPI_FLAG_TO; in HAL_OSPI_IRQHandler()
Dstm32l4xx_hal_qspi.c587 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC); in HAL_QSPI_IRQHandler()
717 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM); in HAL_QSPI_IRQHandler()
741 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE); in HAL_QSPI_IRQHandler()
790 WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO); in HAL_QSPI_IRQHandler()
Dstm32l4xx_hal_gfxmmu.c678 hgfxmmu->Instance->FCR = error; in HAL_GFXMMU_IRQHandler()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_lcd.c251 MODIFY_REG(hlcd->Instance->FCR, \ in HAL_LCD_Init()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_lcd.c244 MODIFY_REG(hlcd->Instance->FCR, \ in HAL_LCD_Init()
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h402 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h409 …__IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04… member
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h418 …__IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04… member
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h604 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
685 …__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset… member