Searched refs:EIC_CONFIG_FILTEN5 (Results 1 – 2 of 2) sorted by relevance
887 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN5; in hri_eic_set_CONFIG_FILTEN5_bit()895 tmp = (tmp & EIC_CONFIG_FILTEN5) >> EIC_CONFIG_FILTEN5_Pos; in hri_eic_get_CONFIG_FILTEN5_bit()904 tmp &= ~EIC_CONFIG_FILTEN5; in hri_eic_write_CONFIG_FILTEN5_bit()913 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN5; in hri_eic_clear_CONFIG_FILTEN5_bit()920 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN5; in hri_eic_toggle_CONFIG_FILTEN5_bit()
366 #define EIC_CONFIG_FILTEN5 (_U(0x1) << EIC_CONFIG_FILTEN5_Pos) macro