Home
last modified time | relevance | path

Searched refs:CSR (Results 1 – 25 of 64) sorted by relevance

123

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_opamp_ex.c147 opampmode1 = READ_BIT(hopamp1->Instance->CSR,OPAMP_CSR_OPAMODE); in HAL_OPAMPEx_SelfCalibrateAll()
148 opampmode2 = READ_BIT(hopamp2->Instance->CSR,OPAMP_CSR_OPAMODE); in HAL_OPAMPEx_SelfCalibrateAll()
151 MODIFY_REG(hopamp1->Instance->CSR, OPAMP_CSR_OPAMODE, OPAMP_STANDALONE_MODE); in HAL_OPAMPEx_SelfCalibrateAll()
152 MODIFY_REG(hopamp2->Instance->CSR, OPAMP_CSR_OPAMODE, OPAMP_STANDALONE_MODE); in HAL_OPAMPEx_SelfCalibrateAll()
155 SET_BIT(hopamp1->Instance->CSR, OPAMP_CSR_USERTRIM); in HAL_OPAMPEx_SelfCalibrateAll()
156 SET_BIT(hopamp2->Instance->CSR, OPAMP_CSR_USERTRIM); in HAL_OPAMPEx_SelfCalibrateAll()
178 SET_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALON); in HAL_OPAMPEx_SelfCalibrateAll()
179 SET_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALON); in HAL_OPAMPEx_SelfCalibrateAll()
182 CLEAR_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALSEL); in HAL_OPAMPEx_SelfCalibrateAll()
183 CLEAR_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALSEL); in HAL_OPAMPEx_SelfCalibrateAll()
[all …]
Dstm32l4xx_hal_opamp.c380 CLEAR_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALON); in HAL_OPAMP_Init()
384 MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_PGA, \ in HAL_OPAMP_Init()
396 MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_FOLLOWER, \ in HAL_OPAMP_Init()
405 MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_STANDALONE, \ in HAL_OPAMP_Init()
440 MODIFY_REG(OPAMP1->CSR, OPAMP1_CSR_OPARANGE, hopamp->Init.PowerSupplyRange); in HAL_OPAMP_Init()
482 CLEAR_BIT(hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); in HAL_OPAMP_DeInit()
483 MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_RESET_BITS, OPAMP_CSR_RESET_VALUE); in HAL_OPAMP_DeInit()
583 SET_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); in HAL_OPAMP_Start()
630 CLEAR_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); in HAL_OPAMP_Stop()
691 opampmode = READ_BIT(hopamp->Instance->CSR,OPAMP_CSR_OPAMODE); in HAL_OPAMP_SelfCalibrate()
[all …]
Dstm32l4xx_hal_comp.c350 comp_voltage_scaler_initialized = READ_BIT(hcomp->Instance->CSR, COMP_CSR_SCALEN); in HAL_COMP_Init()
365 MODIFY_REG(hcomp->Instance->CSR, in HAL_COMP_Init()
372 MODIFY_REG(hcomp->Instance->CSR, in HAL_COMP_Init()
380 MODIFY_REG(hcomp->Instance->CSR, in HAL_COMP_Init()
395 SET_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE); in HAL_COMP_Init()
399 CLEAR_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE); in HAL_COMP_Init()
405 if ((READ_BIT(hcomp->Instance->CSR, COMP_CSR_SCALEN) != 0UL) && in HAL_COMP_Init()
515 WRITE_REG(hcomp->Instance->CSR, 0x00000000UL); in HAL_COMP_DeInit()
776 SET_BIT(hcomp->Instance->CSR, COMP_CSR_EN); in HAL_COMP_Start()
829 CLEAR_BIT(hcomp->Instance->CSR, COMP_CSR_EN); in HAL_COMP_Stop()
[all …]
Dstm32l4xx_hal.c612 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling); in HAL_SYSCFG_VREFBUF_VoltageScalingConfig()
628 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode); in HAL_SYSCFG_VREFBUF_HighImpedanceConfig()
651 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); in HAL_SYSCFG_EnableVREFBUF()
657 while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == 0U) in HAL_SYSCFG_EnableVREFBUF()
675 CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); in HAL_SYSCFG_DisableVREFBUF()
Dstm32l4xx_ll_opamp.c128 LL_OPAMP_WriteReg(OPAMPx, CSR, 0x00000000U); in LL_OPAMP_DeInit()
174 MODIFY_REG(OPAMPx->CSR, in LL_OPAMP_Init()
189 MODIFY_REG(OPAMPx->CSR, in LL_OPAMP_Init()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_comp.h371 MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_WINMODE, WindowMode); in LL_COMP_SetCommonWindowMode()
386 return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_WINMODE)); in LL_COMP_GetCommonWindowMode()
410 MODIFY_REG(COMPx->CSR, COMP_CSR_PWRMODE, PowerMode); in LL_COMP_SetPowerMode()
424 return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_PWRMODE)); in LL_COMP_GetPowerMode()
482 MODIFY_REG(COMPx->CSR, in LL_COMP_ConfigInputs()
486 MODIFY_REG(COMPx->CSR, in LL_COMP_ConfigInputs()
509 MODIFY_REG(COMPx->CSR, COMP_CSR_INPSEL, InputPlus); in LL_COMP_SetInputPlus()
528 return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_INPSEL)); in LL_COMP_GetInputPlus()
571 …MODIFY_REG(COMPx->CSR, COMP_CSR_INMESEL | COMP_CSR_INMSEL | COMP_CSR_SCALEN | COMP_CSR_BRGEN, Inpu… in LL_COMP_SetInputMinus()
573 MODIFY_REG(COMPx->CSR, COMP_CSR_INMSEL | COMP_CSR_SCALEN | COMP_CSR_BRGEN, InputMinus); in LL_COMP_SetInputMinus()
[all …]
Dstm32l4xx_ll_opamp.h394 MODIFY_REG(OPAMP1->CSR, OPAMP1_CSR_OPARANGE, PowerRange); in LL_OPAMP_SetCommonPowerRange()
410 return (uint32_t)(READ_BIT(OPAMP1->CSR, OPAMP1_CSR_OPARANGE)); in LL_OPAMP_GetCommonPowerRange()
433 MODIFY_REG(OPAMPx->CSR, OPAMP_CSR_OPALPM, (PowerMode & OPAMP_POWERMODE_CSR_BIT_MASK)); in LL_OPAMP_SetPowerMode()
446 register uint32_t power_mode = (READ_BIT(OPAMPx->CSR, OPAMP_CSR_OPALPM)); in LL_OPAMP_GetPowerMode()
473 MODIFY_REG(OPAMPx->CSR, OPAMP_CSR_CALON, Mode); in LL_OPAMP_SetMode()
492 return (uint32_t)(READ_BIT(OPAMPx->CSR, OPAMP_CSR_CALON)); in LL_OPAMP_GetMode()
513 MODIFY_REG(OPAMPx->CSR, OPAMP_CSR_OPAMODE | OPAMP_CSR_CALON, FunctionalMode); in LL_OPAMP_SetFunctionalMode()
528 return (uint32_t)(READ_BIT(OPAMPx->CSR, OPAMP_CSR_OPAMODE)); in LL_OPAMP_GetFunctionalMode()
546 MODIFY_REG(OPAMPx->CSR, OPAMP_CSR_PGGAIN, PGAGain); in LL_OPAMP_SetPGAGain()
563 return (uint32_t)(READ_BIT(OPAMPx->CSR, OPAMP_CSR_PGGAIN)); in LL_OPAMP_GetPGAGain()
[all …]
Dstm32l4xx_ll_dmamux.h1250 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL); in LL_DMAMUX_IsActiveFlag_SO0()
1261 …return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);; in LL_DMAMUX_IsActiveFlag_SO1()
1272 …return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);; in LL_DMAMUX_IsActiveFlag_SO2()
1283 …return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);; in LL_DMAMUX_IsActiveFlag_SO3()
1294 …return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);; in LL_DMAMUX_IsActiveFlag_SO4()
1305 …return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);; in LL_DMAMUX_IsActiveFlag_SO5()
1316 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL); in LL_DMAMUX_IsActiveFlag_SO6()
1327 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL); in LL_DMAMUX_IsActiveFlag_SO7()
1338 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL); in LL_DMAMUX_IsActiveFlag_SO8()
1349 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL); in LL_DMAMUX_IsActiveFlag_SO9()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_comp.h296 MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM, WindowMode); in LL_COMP_SetCommonWindowMode()
311 return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_COMP1WM)); in LL_COMP_GetCommonWindowMode()
335 MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2SPEED, PowerMode); in LL_COMP_SetPowerMode()
351 return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2SPEED)); in LL_COMP_GetPowerMode()
399 MODIFY_REG(COMPx->CSR, in LL_COMP_ConfigInputs()
424 MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INPSEL, InputPlus); in LL_COMP_SetInputPlus()
446 return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INPSEL)); in LL_COMP_GetInputPlus()
477 MODIFY_REG(COMPx->CSR, COMP_CSR_COMP2INNSEL, InputMinus); in LL_COMP_SetInputMinus()
502 return (uint32_t)(READ_BIT(COMPx->CSR, COMP_CSR_COMP2INNSEL)); in LL_COMP_GetInputMinus()
530 …MODIFY_REG(COMPx->CSR, (COMP_CSR_COMP1LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN1 | COMP_CSR_COMP2LPTIM1IN… in LL_COMP_SetOutputLPTIM()
[all …]
Dstm32l0xx_ll_rcc.h1037 SET_BIT(RCC->CSR, RCC_CSR_LSEON); in LL_RCC_LSE_Enable()
1047 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON); in LL_RCC_LSE_Disable()
1057 SET_BIT(RCC->CSR, RCC_CSR_LSEBYP); in LL_RCC_LSE_EnableBypass()
1067 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP); in LL_RCC_LSE_DisableBypass()
1083 MODIFY_REG(RCC->CSR, RCC_CSR_LSEDRV, LSEDrive); in LL_RCC_LSE_SetDriveCapability()
1097 return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_LSEDRV)); in LL_RCC_LSE_GetDriveCapability()
1107 SET_BIT(RCC->CSR, RCC_CSR_LSECSSON); in LL_RCC_LSE_EnableCSS()
1119 CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON); in LL_RCC_LSE_DisableCSS()
1129 return (READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == (RCC_CSR_LSERDY)); in LL_RCC_LSE_IsReady()
1139 return (READ_BIT(RCC->CSR, RCC_CSR_LSECSSD) == (RCC_CSR_LSECSSD)); in LL_RCC_LSE_IsCSSDetected()
[all …]
Dstm32l0xx_ll_pwr.h501 SET_BIT(PWR->CSR, WakeUpPin); in LL_PWR_EnableWakeUpPin()
519 CLEAR_BIT(PWR->CSR, WakeUpPin); in LL_PWR_DisableWakeUpPin()
537 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); in LL_PWR_IsEnabledWakeUpPin()
651 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); in LL_PWR_IsActiveFlag_WU()
661 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); in LL_PWR_IsActiveFlag_SB()
672 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); in LL_PWR_IsActiveFlag_PVDO()
684 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); in LL_PWR_IsActiveFlag_VREFINTRDY()
694 return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS)); in LL_PWR_IsActiveFlag_VOSF()
704 return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF)); in LL_PWR_IsActiveFlag_REGLPF()
Dstm32l0xx_hal_rcc.h1162 #define __HAL_RCC_LSI_ENABLE() SET_BIT(RCC->CSR, RCC_CSR_LSION)
1169 #define __HAL_RCC_LSI_DISABLE() CLEAR_BIT(RCC->CSR, RCC_CSR_LSION)
1252 SET_BIT(RCC->CSR, RCC_CSR_LSEON); \
1256 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON); \
1257 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP); \
1261 SET_BIT(RCC->CSR, RCC_CSR_LSEBYP); \
1262 SET_BIT(RCC->CSR, RCC_CSR_LSEON); \
1266 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON); \
1267 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP); \
1523 RCC->CSR |= ((__RTC_CLKSOURCE__) & RCC_CSR_RTCSEL); \
[all …]
/loramac-node-2.7.6/src/boards/mcu/saml21/hri/
Dhri_systick_l21.h70 ((Systick *)hw)->CSR.reg |= SysTick_CSR_ENABLE; in hri_systick_set_CSR_ENABLE_bit()
77 tmp = ((Systick *)hw)->CSR.reg; in hri_systick_get_CSR_ENABLE_bit()
86 tmp = ((Systick *)hw)->CSR.reg; in hri_systick_write_CSR_ENABLE_bit()
89 ((Systick *)hw)->CSR.reg = tmp; in hri_systick_write_CSR_ENABLE_bit()
96 ((Systick *)hw)->CSR.reg &= ~SysTick_CSR_ENABLE; in hri_systick_clear_CSR_ENABLE_bit()
103 ((Systick *)hw)->CSR.reg ^= SysTick_CSR_ENABLE; in hri_systick_toggle_CSR_ENABLE_bit()
110 ((Systick *)hw)->CSR.reg |= SysTick_CSR_TICKINT; in hri_systick_set_CSR_TICKINT_bit()
117 tmp = ((Systick *)hw)->CSR.reg; in hri_systick_get_CSR_TICKINT_bit()
126 tmp = ((Systick *)hw)->CSR.reg; in hri_systick_write_CSR_TICKINT_bit()
129 ((Systick *)hw)->CSR.reg = tmp; in hri_systick_write_CSR_TICKINT_bit()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_opamp_ex.c170 tmp_OpaxSwitchesContextBackup = READ_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS); in HAL_OPAMPEx_SelfCalibrateAll()
174 CLEAR_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES_ALL_OPAMPS); in HAL_OPAMPEx_SelfCalibrateAll()
214 CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD_ALL); in HAL_OPAMPEx_SelfCalibrateAll()
234 MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_L_ALL, in HAL_OPAMPEx_SelfCalibrateAll()
252 MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_H_ALL, in HAL_OPAMPEx_SelfCalibrateAll()
303 if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) != tmp_Opa1calout_DefaultSate) in HAL_OPAMPEx_SelfCalibrateAll()
314 if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) != tmp_Opa2calout_DefaultSate) in HAL_OPAMPEx_SelfCalibrateAll()
325 if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp3)) != tmp_Opa3calout_DefaultSate) in HAL_OPAMPEx_SelfCalibrateAll()
343 if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp1)) == tmp_Opa1calout_DefaultSate) in HAL_OPAMPEx_SelfCalibrateAll()
351 if (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPAXCALOUT(hopamp2)) == tmp_Opa2calout_DefaultSate) in HAL_OPAMPEx_SelfCalibrateAll()
[all …]
Dstm32l1xx_hal_opamp.c316 tmp_csr = OPAMP->CSR; in HAL_OPAMP_Init()
472 OPAMP->CSR = tmp_csr; in HAL_OPAMP_Init()
511 SET_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD(hopamp)); in HAL_OPAMP_DeInit()
520 CLEAR_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES(hopamp)); in HAL_OPAMP_DeInit()
616 CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD(hopamp)); in HAL_OPAMP_Start()
656 SET_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD(hopamp)); in HAL_OPAMP_Stop()
725 tmp_OpaxSwitchesContextBackup = READ_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES(hopamp)); in HAL_OPAMP_SelfCalibrate()
729 CLEAR_BIT(OPAMP->CSR, OPAMP_CSR_ALL_SWITCHES(hopamp)); in HAL_OPAMP_SelfCalibrate()
749 CLEAR_BIT (OPAMP->CSR, OPAMP_CSR_OPAXPD(hopamp)); in HAL_OPAMP_SelfCalibrate()
765 MODIFY_REG(OPAMP->CSR, OPAMP_CSR_OPAXCAL_L(hopamp), in HAL_OPAMP_SelfCalibrate()
[all …]
Dstm32l1xx_hal_comp.c295 MODIFY_REG(COMP->CSR, COMP_CSR_400KPD | COMP_CSR_10KPD | COMP_CSR_400KPU | COMP_CSR_10KPU, in HAL_COMP_Init()
308 MODIFY_REG(COMP->CSR, COMP_CSR_OUTSEL | in HAL_COMP_Init()
317 MODIFY_REG(COMP->CSR, COMP_CSR_OUTSEL | in HAL_COMP_Init()
391 CLEAR_BIT(COMP->CSR , COMP_CSR_400KPD | COMP_CSR_10KPD | COMP_CSR_400KPU | COMP_CSR_10KPU); in HAL_COMP_DeInit()
395 CLEAR_BIT(COMP->CSR , COMP_CSR_OUTSEL | in HAL_COMP_DeInit()
744 if(READ_BIT(COMP->CSR, __COMP_CSR_CMPXOUT(hcomp)) == RESET) in HAL_COMP_GetOutputLevel()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_opamp.h404 MODIFY_REG(OPAMP->CSR, OPAMP_CSR_AOP_RANGE, PowerRange); in LL_OPAMP_SetCommonPowerRange()
420 return (uint32_t)(READ_BIT(OPAMP->CSR, OPAMP_CSR_AOP_RANGE)); in LL_OPAMP_GetCommonPowerRange()
445 MODIFY_REG(OPAMP->CSR, in LL_OPAMP_SetPowerMode()
462 …register uint32_t power_mode = (READ_BIT(OPAMP->CSR, OPAMP_CSR_OPA1LPM << __OPAMP_INSTANCE_BITOFFS… in LL_OPAMP_GetPowerMode()
497 CLEAR_BIT(OPAMP->CSR, in LL_OPAMP_SetMode()
521 return (uint32_t)(((READ_BIT(OPAMP->CSR, in LL_OPAMP_GetMode()
543 MODIFY_REG(OPAMP->CSR, in LL_OPAMP_SetFunctionalMode()
559 return (uint32_t)(READ_BIT(OPAMP->CSR, OPAMP_CSR_S3SEL1 << __OPAMP_INSTANCE_BITOFFSET(OPAMPx)) in LL_OPAMP_GetFunctionalMode()
589 MODIFY_REG(OPAMP->CSR, in LL_OPAMP_SetInputNonInverting()
611 register uint32_t input_non_inverting_opamp_x = READ_BIT(OPAMP->CSR, in LL_OPAMP_GetInputNonInverting()
[all …]
Dstm32l1xx_ll_comp.h362 MODIFY_REG(COMPxy_COMMON->CSR, COMP_CSR_WNDWE, WindowMode); in LL_COMP_SetCommonWindowMode()
377 return (uint32_t)(READ_BIT(COMPxy_COMMON->CSR, COMP_CSR_WNDWE)); in LL_COMP_GetCommonWindowMode()
401 MODIFY_REG(COMP->CSR, COMP_CSR_SPEED, PowerMode); in LL_COMP_SetPowerMode()
416 return (uint32_t)(READ_BIT(COMP->CSR, COMP_CSR_SPEED)); in LL_COMP_GetPowerMode()
584 MODIFY_REG(COMP->CSR, in LL_COMP_SetInputMinus()
612 return (uint32_t)((READ_BIT(COMP->CSR, COMP_CSR_INSEL) * __COMP_IS_INSTANCE_EVEN(COMPx)) in LL_COMP_GetInputMinus()
638 MODIFY_REG(COMP->CSR, in LL_COMP_SetInputPullingResistor()
668 …return (uint32_t)((READ_BIT(COMP->CSR, (COMP_CSR_10KPU | COMP_CSR_400KPU | COMP_CSR_10KPD | COMP_C… in LL_COMP_GetInputPullingResistor()
706 MODIFY_REG(COMP->CSR, in LL_COMP_SetOutputSelection()
736 return (uint32_t)((READ_BIT(COMP->CSR, COMP_CSR_OUTSEL) * __COMP_IS_INSTANCE_EVEN(COMPx)) in LL_COMP_GetOutputSelection()
[all …]
Dstm32l1xx_ll_rcc.h703 SET_BIT(RCC->CSR, RCC_CSR_LSEON); in LL_RCC_LSE_Enable()
713 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEON); in LL_RCC_LSE_Disable()
723 SET_BIT(RCC->CSR, RCC_CSR_LSEBYP); in LL_RCC_LSE_EnableBypass()
733 CLEAR_BIT(RCC->CSR, RCC_CSR_LSEBYP); in LL_RCC_LSE_DisableBypass()
744 SET_BIT(RCC->CSR, RCC_CSR_LSECSSON); in LL_RCC_LSE_EnableCSS()
756 CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON); in LL_RCC_LSE_DisableCSS()
767 return (READ_BIT(RCC->CSR, RCC_CSR_LSERDY) == (RCC_CSR_LSERDY)); in LL_RCC_LSE_IsReady()
778 return (READ_BIT(RCC->CSR, RCC_CSR_LSECSSD) == (RCC_CSR_LSECSSD)); in LL_RCC_LSE_IsCSSDetected()
797 SET_BIT(RCC->CSR, RCC_CSR_LSION); in LL_RCC_LSI_Enable()
807 CLEAR_BIT(RCC->CSR, RCC_CSR_LSION); in LL_RCC_LSI_Disable()
[all …]
Dstm32l1xx_ll_pwr.h501 SET_BIT(PWR->CSR, WakeUpPin); in LL_PWR_EnableWakeUpPin()
519 CLEAR_BIT(PWR->CSR, WakeUpPin); in LL_PWR_DisableWakeUpPin()
537 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); in LL_PWR_IsEnabledWakeUpPin()
618 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); in LL_PWR_IsActiveFlag_WU()
628 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); in LL_PWR_IsActiveFlag_SB()
639 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); in LL_PWR_IsActiveFlag_PVDO()
651 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); in LL_PWR_IsActiveFlag_VREFINTRDY()
661 return (READ_BIT(PWR->CSR, LL_PWR_CSR_VOS) == (LL_PWR_CSR_VOS)); in LL_PWR_IsActiveFlag_VOS()
671 return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF)); in LL_PWR_IsActiveFlag_REGLPF()
Dstm32l1xx_hal_comp.h287 SET_BIT(COMP->CSR, COMP_CSR_CMP1EN) \
289 MODIFY_REG(COMP->CSR, COMP_CSR_INSEL, (__HANDLE__)->Init.InvertingInput ) \
300 CLEAR_BIT(COMP->CSR, COMP_CSR_CMP1EN) \
302 CLEAR_BIT(COMP->CSR, COMP_CSR_INSEL) \
312 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->CSR, (__FLAG__)…
527 (((READ_BIT(COMP->CSR , COMP_CSR_CMP1EN) == COMP_CSR_CMP1EN) \
530 (((READ_BIT(COMP->CSR , COMP_CSR_INSEL) != RESET) \
Dstm32l1xx_hal_adc_ex.h262 (SET_BIT(COMP->CSR, COMP_CSR_FCH3)) \
266 (SET_BIT(COMP->CSR, COMP_CSR_FCH8)) \
270 (SET_BIT(COMP->CSR, COMP_CSR_RCH13)) \
272 (SET_BIT(COMP->CSR, 0x00000000)) \
280 (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH3)) \
284 (CLEAR_BIT(COMP->CSR, COMP_CSR_FCH8)) \
288 (CLEAR_BIT(COMP->CSR, COMP_CSR_RCH13)) \
290 (SET_BIT(COMP->CSR, 0x00000000)) \
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_comp.c367 MODIFY_REG(hcomp->Instance->CSR, in HAL_COMP_Init()
375 MODIFY_REG(hcomp->Instance->CSR, in HAL_COMP_Init()
389 SET_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE); in HAL_COMP_Init()
393 CLEAR_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE); in HAL_COMP_Init()
488 WRITE_REG(hcomp->Instance->CSR, 0x00000000U); in HAL_COMP_DeInit()
575 SET_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxEN); in HAL_COMP_Start()
622 CLEAR_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxEN); in HAL_COMP_Stop()
650 if(READ_BIT(COMP12_COMMON->CSR, COMP_CSR_WINMODE) != 0) in HAL_COMP_IRQHandler()
749 return (uint32_t)(READ_BIT(hcomp->Instance->CSR, COMP_CSR_COMPxOUTVALUE) in HAL_COMP_GetOutputLevel()
Dstm32l0xx_hal_rcc_ex.c192 temp_reg = (RCC->CSR & RCC_CSR_RTCSEL); in HAL_RCCEx_PeriphCLKConfig()
203 temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL)); in HAL_RCCEx_PeriphCLKConfig()
210 RCC->CSR = temp_reg; in HAL_RCCEx_PeriphCLKConfig()
414 temp_reg = RCC->CSR; in HAL_RCCEx_GetPeriphCLKFreq()
534 else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY))) in HAL_RCCEx_GetPeriphCLKFreq()
567 else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY))) in HAL_RCCEx_GetPeriphCLKFreq()
599 else if ((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY))) in HAL_RCCEx_GetPeriphCLKFreq()
697 SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ; in HAL_RCCEx_EnableLSECSS()
710 CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON) ; in HAL_RCCEx_DisableLSECSS()
724 SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ; in HAL_RCCEx_EnableLSECSS_IT()
Dstm32l0xx_ll_comp.c174 CLEAR_BIT(COMPx->CSR, in LL_COMP_DeInit()
186 CLEAR_BIT(COMPx->CSR, in LL_COMP_DeInit()
251 MODIFY_REG(COMPx->CSR, in LL_COMP_Init()
263 MODIFY_REG(COMPx->CSR, in LL_COMP_Init()

123