CRS_CFGR_FELIM (reference) in projects: loramac-node-2.7.6

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Searched refs:CRS_CFGR_FELIM (Results 1 – 4 of 4) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
D	stm32l0xx_ll_crs.h	`362 MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_POSITION_FELIM); in LL_CRS_SetFreqErrorLimit() 372 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_POSITION_FELIM); in LL_CRS_GetFreqErrorLimit() 486 … CRS_CFGR_RELOAD \| CRS_CFGR_FELIM \| CRS_CFGR_SYNCDIV \| CRS_CFGR_SYNCSRC \| CRS_CFGR_SYNCPOL, in LL_CRS_ConfigSynchronization()`
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
D	stm32l4xx_ll_crs.h	`352 MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos); in LL_CRS_SetFreqErrorLimit() 362 return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_CFGR_FELIM_Pos); in LL_CRS_GetFreqErrorLimit() 476 … CRS_CFGR_RELOAD \| CRS_CFGR_FELIM \| CRS_CFGR_SYNCDIV \| CRS_CFGR_SYNCSRC \| CRS_CFGR_SYNCPOL, in LL_CRS_ConfigSynchronization()`
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
D	stm32l072xx.h	`1230 #define CRS_CFGR_FELIM CRS_CFGR_FELIM_Msk /* Frequency error l… macro`
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
D	stm32l073xx.h	`1252 #define CRS_CFGR_FELIM CRS_CFGR_FELIM_Msk /* Frequency error l… macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
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babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
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babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
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