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Searched refs:CLKCR (Results 1 – 6 of 6) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_ll_sdmmc.c235 MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg); in SDIO_Init()
Dstm32l1xx_hal_sd.c1246 maxdelay = 120000 / (((hsd->Instance->CLKCR) & 0xFF) + 2); in HAL_SD_Erase()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_sdmmc.h810 #define __SDMMC_ENABLE(__INSTANCE__) ((__INSTANCE__)->CLKCR |= SDMMC_CLKCR_CLKEN)
817 #define __SDMMC_DISABLE(__INSTANCE__) ((__INSTANCE__)->CLKCR &= ~SDMMC_CLKCR_CLKEN)
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_sdmmc.c246 MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\ in SDMMC_Init()
252 MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\ in SDMMC_Init()
Dstm32l4xx_hal_sd.c435 hsd->Instance->CLKCR |= 0x00100000U; in HAL_SD_Init()
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h833 __IO uint32_t CLKCR; /*!< SDMMC clock control register, Address offset: 0x04 */ member