Home
last modified time | relevance | path

Searched refs:CFR (Results 1 – 20 of 20) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_wwdg.h203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); in LL_WWDG_SetPrescaler()
218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); in LL_WWDG_GetPrescaler()
239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); in LL_WWDG_SetWindow()
250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W)); in LL_WWDG_GetWindow()
302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); in LL_WWDG_EnableIT_EWKUP()
313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)); in LL_WWDG_IsEnabledIT_EWKUP()
Dstm32l1xx_hal_wwdg.h186 #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, …
234 #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTE…
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_wwdg.h203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); in LL_WWDG_SetPrescaler()
218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); in LL_WWDG_GetPrescaler()
239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); in LL_WWDG_SetWindow()
250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W)); in LL_WWDG_GetWindow()
302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); in LL_WWDG_EnableIT_EWKUP()
313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)); in LL_WWDG_IsEnabledIT_EWKUP()
Dstm32l0xx_hal_wwdg.h184 #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, …
232 #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTE…
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_wwdg.h197 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); in LL_WWDG_SetPrescaler()
212 return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); in LL_WWDG_GetPrescaler()
233 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); in LL_WWDG_SetWindow()
244 return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); in LL_WWDG_GetWindow()
296 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); in LL_WWDG_EnableIT_EWKUP()
307 return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); in LL_WWDG_IsEnabledIT_EWKUP()
Dstm32l4xx_ll_dmamux.h1448 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0); in LL_DMAMUX_ClearFlag_SO0()
1459 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1); in LL_DMAMUX_ClearFlag_SO1()
1470 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2); in LL_DMAMUX_ClearFlag_SO2()
1481 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3); in LL_DMAMUX_ClearFlag_SO3()
1492 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4); in LL_DMAMUX_ClearFlag_SO4()
1503 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5); in LL_DMAMUX_ClearFlag_SO5()
1514 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6); in LL_DMAMUX_ClearFlag_SO6()
1525 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7); in LL_DMAMUX_ClearFlag_SO7()
1536 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8); in LL_DMAMUX_ClearFlag_SO8()
1547 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9); in LL_DMAMUX_ClearFlag_SO9()
[all …]
Dstm32l4xx_hal_wwdg.h206 #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, …
254 #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTE…
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_dma.c242 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Init()
374 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_DeInit()
589 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort()
645 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort_IT()
781 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_PollForTransfer()
1080 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in DMA_SetConfig()
Dstm32l4xx_hal_wwdg.c218 …WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window)… in HAL_WWDG_Init()
Dstm32l4xx_hal_dma_ex.c264 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMAEx_MUX_IRQHandler()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_wwdg.c194 …WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window)… in HAL_WWDG_Init()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_wwdg.c194 …WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window)… in HAL_WWDG_Init()
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h533 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h581 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h595 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h562 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h562 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h630 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h645 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h1003 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member