Searched refs:APB2CLKDivider (Results 1 – 20 of 20) sorted by relevance
533 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()565 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
892 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()893 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()1235 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
517 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()549 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
968 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()969 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); in HAL_RCC_ClockConfig()1382 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); in HAL_RCC_GetClockConfig()
138 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
318 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
139 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
309 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
149 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
155 …uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from th… member
828 assert_param(IS_LL_UTILS_APB2_DIV(UTILS_ClkInitStruct->APB2CLKDivider)); in UTILS_EnablePLLAndSwitchSystem()861 LL_RCC_SetAPB2Prescaler(UTILS_ClkInitStruct->APB2CLKDivider); in UTILS_EnablePLLAndSwitchSystem()
1213 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); in HAL_RCC_ClockConfig()1214 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); in HAL_RCC_ClockConfig()1636 RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); in HAL_RCC_GetClockConfig()
241 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; in SystemClockConfig()
346 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; in SystemClockConfig()
374 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; in SystemClockConfig()
385 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; in SystemClockConfig()
446 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; in SystemClockConfig()
