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Searched refs:AHBCLKDivider (Results 1 – 20 of 20) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_utils.c397 hpre = UTILS_ClkInitStruct->AHBCLKDivider; in LL_PLL_ConfigSystemClock_MSI()
400 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
411 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI()
412 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_MSI()
475 hpre = UTILS_ClkInitStruct->AHBCLKDivider; in LL_PLL_ConfigSystemClock_HSI()
478 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
489 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI()
490 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_HSI()
571 hpre = UTILS_ClkInitStruct->AHBCLKDivider; in LL_PLL_ConfigSystemClock_HSE()
574 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
[all …]
Dstm32l4xx_hal_rcc.c1104 …) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_… in HAL_RCC_ClockConfig()
1175 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1176 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1630 RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_ll_utils.c531 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
536 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
556 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
Dstm32l1xx_hal_rcc.c777 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
778 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1229 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_ll_utils.c515 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
520 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
540 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
Dstm32l0xx_hal_rcc.c853 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
854 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1376 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_utils.h126 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
Dstm32l1xx_hal_rcc.h312 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_utils.h127 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
Dstm32l0xx_hal_rcc.h303 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_utils.h137 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
Dstm32l4xx_hal_rcc.h149 …uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the … member
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/
Dboard.c239 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/SKiM881AXL/
Dboard.c344 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/NucleoL073/
Dboard.c372 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/NucleoL152/
Dboard.c372 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/SKiM880B/
Dboard.c372 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/SKiM980A/
Dboard.c372 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/NucleoL476/
Dboard.c383 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()
/loramac-node-2.7.6/src/boards/NAMote72/
Dboard.c444 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; in SystemClockConfig()