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Searched refs:bus (Results 1 – 4 of 4) sorted by relevance

/libmctp-latest/
Dcore.c92 static int mctp_message_tx_on_bus(struct mctp_bus *bus, mctp_eid_t src,
305 static void mctp_bus_destroy(struct mctp_bus *bus) in mctp_bus_destroy() argument
307 while (bus->tx_queue_head) { in mctp_bus_destroy()
308 struct mctp_pktbuf *curr = bus->tx_queue_head; in mctp_bus_destroy()
310 bus->tx_queue_head = curr->next; in mctp_bus_destroy()
368 binding->bus = &mctp->busses[0]; in mctp_register_bus()
376 binding->bus = NULL; in mctp_register_bus()
394 binding->bus = NULL; in mctp_unregister_bus()
410 b1->bus = &mctp->busses[0]; in mctp_bridge_busses()
413 b2->bus = &mctp->busses[1]; in mctp_bridge_busses()
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Dlibmctp.h124 struct mctp_bus *bus; member
DREADME.md26 To initialise the MCTP stack with a single hardware bus:
/libmctp-latest/docs/bindings/
Dvendor-ibm-astlpc.md6 host and BMC over the LPC bus on ASPEED BMC platforms.
54 A bus specification that implements ISA bus in a reduced physical form while
60 application memory cycles with respect to the LPC bus. The ASPEED BMCs allow
108 - The host will perform writes by writing to the LPC bus, at predefined
285 the ability to send and receive packets on the LPC bus.