1 /* NXP ENET QOS Header 2 * 3 * Copyright 2024 NXP 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #include <zephyr/kernel.h> 9 #include <zephyr/device.h> 10 #include <zephyr/sys/util.h> 11 #include <zephyr/net/ethernet.h> 12 #include <zephyr/drivers/ethernet/eth_nxp_enet_qos.h> 13 14 /* shorthands */ 15 #define NUM_TX_BUFDESC CONFIG_ETH_NXP_ENET_QOS_TX_BUFFER_DESCRIPTORS 16 #define NUM_RX_BUFDESC CONFIG_ETH_NXP_ENET_QOS_RX_BUFFER_DESCRIPTORS 17 #define LAST_TX_DESC_INDEX NUM_TX_BUFDESC - 1 18 #define LAST_RX_DESC_INDEX NUM_RX_BUFDESC - 1 19 20 /* NXP Organizational Unique Identifier */ 21 #define NXP_OUI_BYTE_0 0xAC 22 #define NXP_OUI_BYTE_1 0x9A 23 #define NXP_OUI_BYTE_2 0x22 24 25 #define FIRST_TX_DESCRIPTOR_FLAG BIT(29) 26 #define LAST_TX_DESCRIPTOR_FLAG BIT(28) 27 #define OWN_FLAG BIT(31) 28 #define RX_INTERRUPT_ON_COMPLETE_FLAG BIT(30) 29 #define TX_INTERRUPT_ON_COMPLETE_FLAG BIT(31) 30 #define BUF1_ADDR_VALID_FLAG BIT(24) 31 #define DESC_RX_PKT_LEN GENMASK(14, 0) 32 33 #define ENET_QOS_MAX_NORMAL_FRAME_LEN 1518 34 35 #define NUM_SWR_WAIT_CHUNKS 5 36 37 struct nxp_enet_qos_tx_read_desc { 38 union { 39 uint32_t buf1_addr; 40 uint32_t head_addr; 41 }; 42 union { 43 uint32_t buf2_addr; 44 uint32_t buf1_addr_alt; 45 }; 46 uint32_t control1; 47 uint32_t control2; 48 }; 49 50 struct nxp_enet_qos_tx_write_desc { 51 uint32_t timestamp_low; 52 uint32_t timestamp_high; 53 uint32_t reserved; 54 uint32_t status; 55 }; 56 57 union nxp_enet_qos_tx_desc { 58 struct nxp_enet_qos_tx_read_desc read; 59 struct nxp_enet_qos_tx_write_desc write; 60 }; 61 62 struct nxp_enet_qos_rx_read_desc { 63 union { 64 uint32_t buf1_addr; 65 uint32_t head_addr; 66 }; 67 uint32_t reserved; 68 uint32_t buf2_addr; 69 uint32_t control; 70 }; 71 72 struct nxp_enet_qos_rx_write_desc { 73 uint32_t vlan_tag; 74 uint32_t control1; 75 uint32_t control2; 76 uint32_t control3; 77 }; 78 79 union nxp_enet_qos_rx_desc { 80 struct nxp_enet_qos_rx_read_desc read; 81 struct nxp_enet_qos_rx_write_desc write; 82 }; 83 84 struct nxp_enet_qos_hw_info { 85 uint16_t max_frame_len; 86 }; 87 88 enum mac_address_source { 89 NXP_ENET_QOS_MAC_ADDR_SOURCE_LOCAL, 90 NXP_ENET_QOS_MAC_ADDR_SOURCE_RANDOM, 91 NXP_ENET_QOS_MAC_ADDR_SOURCE_UNIQUE, 92 NXP_ENET_QOS_MAC_ADDR_SOURCE_INVALID, 93 }; 94 95 struct nxp_enet_qos_mac_config { 96 const struct device *enet_dev; 97 const struct device *phy_dev; 98 enet_qos_t *base; 99 struct nxp_enet_qos_hw_info hw_info; 100 void (*irq_config_func)(void); 101 enum mac_address_source mac_addr_source; 102 }; 103 104 struct nxp_enet_qos_tx_data { 105 struct k_sem tx_sem; 106 struct net_pkt *pkt; 107 struct k_work tx_done_work; 108 struct net_buf *tx_header; 109 volatile union nxp_enet_qos_tx_desc descriptors[NUM_TX_BUFDESC]; 110 }; 111 112 struct nxp_enet_qos_rx_data { 113 struct k_work rx_work; 114 volatile union nxp_enet_qos_rx_desc descriptors[NUM_RX_BUFDESC]; 115 struct net_buf *reserved_bufs[NUM_RX_BUFDESC]; 116 }; 117 118 struct nxp_enet_qos_mac_data { 119 struct net_if *iface; 120 struct net_eth_addr mac_addr; 121 struct nxp_enet_qos_tx_data tx; 122 struct nxp_enet_qos_rx_data rx; 123 }; 124
