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Searched refs:XTHAL_AR_R (Results 1 – 4 of 4) sorted by relevance

/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-matmap.h72 #define XCHAL_CA_BYPASS_R (XTHAL_AR_R | XTHAL_MEM_DEVICE)
75 #define XCHAL_CA_R (XTHAL_AR_R)
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-matmap.h72 #define XCHAL_CA_BYPASS_R (XTHAL_AR_R | XTHAL_MEM_DEVICE)
75 #define XCHAL_CA_R (XTHAL_AR_R)
/hal_xtensa-latest/src/hal/
Dmpu.c216 case XTHAL_AR_R: in is_kernel_readable()
250 case XTHAL_AR_R: in is_kernel_writeable()
272 case XTHAL_AR_R: in is_kernel_executable()
296 case XTHAL_AR_R: in is_user_readable()
318 case XTHAL_AR_R: in is_user_writeable()
345 case XTHAL_AR_R: in is_user_executable()
/hal_xtensa-latest/include/xtensa/
Dhal.h1027 #define XTHAL_AR_R 4 /* Kernel read, User no access*/ macro